AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
AIDA
Draft saved at 00:00:00
Fields marked with
*
are required
Entry time:
Thu May 12 16:55:37 2016
Author
*
:
Subject
*
:
Continued work on beta-trigger for EURICA. However the system seems to have different noise condition than before, which we think appeared after we changed power source for FEE's PSU (https://elog.ph.ed.ac.uk/AIDA/220). This is high frequency noise of low amplitude, with a period of 10 usec. The effect on the resolution measured with the pulser is not too large - thus our conclusion in elog entry 220 that noise conditions had not changed much - but the noise does create a large trigger rate that would not allow us to set a low trigger threshold (for MAC-B outputs from fast discriminators). The rate of singles from front or back, as well as coincidence of front-back strips, increased by more than a factor of ten compared to previous conditions (e.g. ~200 coincidences for one ASIC enables in each side of DSSD1, and fast threshold of 10). Saved some data in this conditions, with a threshold of 16 for the fast discriminators (enabled in one ASIC for 8 of the FEEs). When fast discriminator lowering threshold to 9, the system got upset and lost synchronization. Tomorrow we'll attempt to revert to previous configuration of PSUs. R16*gz: DSSD HV: +100 for all. Leakage current (uA): 4.2, 4.9, 3.7, 3.9, 4.2, 3.8, 10.7 (from Det#1 to veto) Enabled fast discriminators in ASIC2 of DSSD1 and DSSD5 (NNAIDA#: 25, 30, 27, 32, 9, 13, 11, 16) DSSD#1 is next to 207Bi source
Encoding
:
HTML
ELCode
plain
Suppress Email notification
Resubmit as new entry
Attachment 1:
wf11.JPG
Original size: 1597x604
Attachment 2:
e11.JPG
Original size: 1732x609
Attachment 3:
wf13.JPG
Original size: 1719x604
Attachment 4:
wf25.JPG
Original size: 1723x600
Attachment 5:
e25.JPG
Original size: 1708x687
Attachment 6:
wf27.JPG
Original size: 1721x689
Attachment 7:
e27.JPG
Original size: 1717x691
Attachment 8:
Drop attachments here...
Draft saved at 00:00:00
ELOG V3.1.4-unknown