Changes from configuration described by Elog entry https://elog.ph.ed.ac.uk/AIDA/3
are as follows:


HV

Emco Q05-5 ISOLATED, PROPORTIONAL DC TO HV DC CONVERTER

Input TTi QL355T set +1.5V, Emco Q05-5 output +194.6V

Output RC filter 1uF x 1MOhm

i.e. a filtered, floating high voltage detector bias supply
cf. NIM-bin grounded Silena 7710 Quad Bias used previously


ASIC Adaptor PCB

nnaida11 & nnaida12 LK 3 & 7
nnaida13 & nnaida13 LK 1, 3, 5, & 7

HV + -> nnaida11 & nnaida12
HV - -> nnaida13 & nnaida14 
DSSSD grounded locally at nnaida12 & nnaida13 adaptor PCBs
by ground links LK 1 & 5 (cf. Silena 7710 Quad Bias Supply
used previously).


ASIC settings

Default ASIC settings (see attachments 1-4)


Observe stable operation of both positive and negative polarity
FEE64s using default ASIC parameters and a floating HV detector
bias supply


Attachments
1-4 nnaida11, 12, 13, & 14 ASIC settings
5-8 nnaida11, 12, 13, & 14 hit/rate patterns
9-12 nnaida11, 12, 13, & 14 ASIC # 4 ADC spectra
13 nnaida12 ASIC # 1 waveforms
14 nnaida14 ASIC # 1 waveforms
15 Emco Q-series catalogue