AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
AIDA
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Wed May 24 14:51:06 2017
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<p> </p> <table align="center" cellspacing="1" style="border-image:none; border:1px solid rgb(72, 96, 144); width:98%"> <tbody> <tr> <td style="background-color: rgb(72, 96, 144);">Quote:</td> </tr> <tr> <td style="background-color: rgb(255, 255, 176);"> <p>I have tarred and zipped all 24 logs and shipped them back to the UK. Now I can browse through them.</p> <p>Studying the "panics" :=</p> <p> nnaida17 has one which is an NFS mount failure.</p> <p><em>Do we understand why? Are there different/additional NFS mount options to be considered? </em></p> <p> nnaida20 and 22 have one each which are "Starting midas: Page fault in user mode with in_atomic() = 1 mm = c61bf200" but with different values for the mm=.</p> <p>I am studying the web to understand why this may occur in a particular program. Both occur at similar places after "Starting midas".</p> <p>There are reports of "Clock not locked. status = 0xc" during Setup Electronics which is a bit unusual. These occur in nnaida4, 17 and 22.</p> <p>Also "Clock not locked. status = 0xd" in nnaida23,17,3,19,6,5,14,7,9. Further investigation to understand all these.</p> <p>The bit allocation of the Clock Status word is:- </p> <p style="margin-left: 36pt;">Bit 0 : Lock Detect bit from LMK03200 #1</p> <p style="margin-left: 36pt;">Bit 1 : Lock Detect bit from LMK03200 #2</p> <p style="margin-left: 36pt;">Bit 2 : Lock detect from the internal DCM for the mux clock.</p> <p style="margin-left: 36pt;">Bit 3: iDelay ready signal</p> <p>The LMK03200 are the two PLLs which are connected to the 50MHz input clock. The clock setup in the log directly before the error report for nnaiad17 had reported correctly setup and the ADCs had calibrated, these rely on a stable 50MHz from the LMK03200s.</p> <p> </p> <p>I have also spotted some diagnostic information about the waveform readout that is useful.</p> <p> </p> <p>Just a reminder..... when power cycling the equipment please leave the power off for at least 10 seconds to allow all the capacitors in the supply chain to discharge.</p> <p><em>We do - standard procedure is to wait 20s.</em></p> <p>Also note that the console monitor window in the Pi can be used to check that all FEE64s have "finished" the power-on sequence by using the "parse" button.</p> <p>Since it doesn't use the DAQ software it won't lock-up and it will give an indication of progress.</p> <p><em>We do check for further panics. I assume we would have to read each system log to check that the boot sequence and app load had completed?</em></p> </td> </tr> </tbody> </table> <p> </p>
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