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AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
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AIDA |
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Message ID: 872
Entry time: Sun Jul 16 09:36:40 2023
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Author: |
TD |
Subject: |
15-16 July 2023 |
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Saturday 15 July
Cooling water ON - temperature c. +19 deg C ( controls adjacent to S4 entrance )
Flow taps ON ( S4 )
Cannot see float in mechanical flow gauge - sediment?
USB-controlled ac mains relay flow interlock ON.
Flow vibration can be felt in cooling manifold and lines.
13x FEE64s installed - see attachment 2 ( courtesy NH )
FEE64 # Cable set #
1 1
2 2
3 3
4 4
5
6 6
7
8 8
9 9
10 5
11 11
12 7
15
10x FEE64s configured - update /MIDAS/config/TclHttpd/aidas-gsi@8015/startup.tcl - see attachment 1
ttyUSB1 aida01
ttyUSB3 aida12
ttyUSB4 aida02
ttyUSB6 aida03
ttyUSB7 aida04
ttyUSB9 aida11
ttyUSB10 aida09
ttyUSB12 aida10
ttyUSB13 aida08
ttyUSB15 aida06
Update /etc/dhcp/dhcpd.conf - correct MAC address aida09
from
host aida09 {
hardware ethernet d8:80:39:41:ee:01;
fixed-address 192.168.11.9;
option root-path "/home/Embedded/XilinxLinux/ppc_4xx/rfs/aida09";
}
to
host aida09 {
hardware ethernet d8:80:39:41:ee:10;
fixed-address 192.168.11.9;
option root-path "/home/Embedded/XilinxLinux/ppc_4xx/rfs/aida09";
}
5x MACBs installed - see attachment 3
Note configuration setting 0x0 for all 5x MACBs ( cf. 0x3 per https://elog.ph.ed.ac.uk/DESPEC/517 )
17.30 System wide checks - see attachments 4-7
OK *except* aida09 clock and WR decoder errors
FEE64 temperatures OK - see attachment 8
Sunday 16 July
11.30 Restart
FEE64 temperatures OK - attachment 9
System wide checks - attachments 10-15
aida09 clock errors - no WR timestamp
aida09 WR status 0xd - attachments 16-18
Local controls aida01 cf. aida09 - attachments 19-20
status register 0xf cf. 0x4
BuTIS interface control 0x3 cf. 0x0
14.00 ASIC settings 2021Apr29-13-16-00
slow comparator 0x64
FEE64s 1, 3, 9, 10, 11, 12 + input polarity
FEE64s 2, 4, 6, 8 - input polarity
BNC PB-5 pulser
amplitude 1.0V
attenuation x1
tail pulse
tau_d 1ms
frequency 100Hz
polarity +
EG&G Ortec 534 Sum & Invert Amplifier
to provide - polarity test inputs
Test + and - signals daisy-chained to FEE64s - end of daisy-chain terminated by 50 Ohms.
Adaptor PCB
AIDA Half Rev B 180623 fitted FEE64s 1, 2, 3, 4, 9, 10, 11, 12
*all* LKs fitted
AIDA Half Rev A 120418 fitted FEE64s 6, 8
*no* LKs fitted
No drain wire connections from adaptor PCB to FEE64 cooling plate fitted
per FEE64 rate spectra - attachment 21
p+n FEE64 1.8.L spectra - attachments 22-23
aida01 1.8.L pulser peak width 15 ch FWHM
n+n FEE64 1.8.L spectra - attachments 24-25
double peak spectra
p+n FEE64 1.8.W spectra 20us FSR - attachments 26-28
n+n FEE64 1.8.W spectra 20us FSR - attachments 29-31
Observe significantly higher noise for rev A adaptors
No data observed for aida09
aida01 2.5.* data missing
FEE64 statistics aida01, aida09, good events, ADC data, pause, resume, disc, correlation & WR 48-63 - attachments 32-40 |
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