AIDA
GELINA
BRIKEN
nToF
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ISOLDE
CIRCE
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EDI_PSA
179Ta
CARME
StellarModelling
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K40
AIDA
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<p> <table width="98%" align="center" cellspacing="1" style="border:1px solid #486090;"> <tbody> <tr> <td cellpadding="3px" style="background-color:#486090; font-weidht:bold; color:white;">Quote:</td></tr> <tr> <td cellpadding="10px" style="background-color:#FFFFB0;"><p>While investigating a VHDL conundrum I have noticed that the Mux ADC serial readout clock has a 'FAST' slew rate on ASICs 1&2 and a normal slew rate on ASICs 3&4.</p> <p>Is it possible that the higher slew rate is actually better filtered by the ASIC de-coupling etc than the slower one.</p> <p>Unfortunately I can't try this out yet as the "conundrum" means the VHDL version isn't good enough just yet.</p> <p>Hopefully today.....</p> <p> </p> <p>Patrick</p></td> </tr> </tbody> </table> </p><p> </p>
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