FAIR phase 0 DESPEC experiments are scheduled March-May 2020 see

https://www.gsi.de/en/work/organisation/scientific_boards/user/beam_time.htm

The current (19.12.19) version of the schedule is v22 

https://www.gsi.de/fileadmin/beamtime/2020/BTS2020_v022_all.pdf

AIDA will used for DESPEC experiments S480, S452, S470 & S460

To be done at GSI

- check DSSSD - FEE64 connection using alpha background data collected pre- and post- Dec 19 test (NH)

- investigate system noise (TD, NH et al.)

- replace aida10 adaptor PCB and/or FEE64 (TD, NH et al.)

Other issues requiring the support of Carl, James, Patrick & Vic are 
in order of our ( = TD + NH ) priority - Carl et al. may have a different
view. If so, we should discuss.

- ASIC settings / Options DB 'corruption' issues (VFEP, CW et al.)

- waveform data (PCS, JL et al.)

- FEE64/ASIC sync (PCS, JL et al.)

ELOG V3.1.3-unknown