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Sat Mar 29 11:26:57 2025
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> 21.04 DAQ continues OK - file R20_379 > > ASIC settings 2019Dec19-16.19.51 > DSSSD#1 slow comparator 0xa > DSSSD#2 slow comparator 0xa > DSSSD#3 slow comparator 0xd > > BNC PB-5 Pulser > Amplitude1.0V > Attenuation x1 > Frequency 2Hz > tau_d 1ms > - polarity > Delay 250ns, tail pulse > > System wide checks all OK *except* > > ADC Calibration > FEE64 module aida07 failed > FEE64 module aida10 failed > Calibration test result: Passed 10, Failed 2 > > If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module > > Check FPGA Timestamp Errors > Base Current Difference > aida12 fault 0x0 : 0x1 : 1 > FPGA Timestamp error counter test result: Passed 11, Failed 1 > > If any of these counts are reported as in error > The ASIC readout system has detected a timeslip. > That is the timestamp read from the time FIFO is not younger than the last > > FEE64 Temperatures OK - attachment 1 > Good event statistics OK - attachment 2 > Detector bias & leakage currents OK - attachment 3 > Merger OK - 4.2M data items/s > TapeServer OK - 45 Mb/s > > 21.20 no merger server error/warning messages since 16.30UTC > > 21.35 p+n junction strip HEC & LEC spectra, Rate spectra common y-scale 0-30000 & 0-10 > all spectra zero'd > > 22.05 no beam for 2-3h whilst accelerator generator is fixed
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