ASIC settings 2019Dec19-16.19.51
DSSSD#1 slow comparator 0xa
DSSSD#2 slow comparator 0xa
DSSSD#3 slow comparator 0xd
BNC PB-5 Pulser
Amplitude1.0V
Attenuation x1
Frequency 2Hz
tau_d 1ms
- polarity
Delay 250ns, tail pulse
08:09 System wide checks ok *except*
aida09 fails clock check
aida09 calibration failed
08:14 FEE64 temperatures ok - attachment 1
good event statistics ok - attachment 2
detector bias/leakage current ok - attachment 3
08:22 Merger 4.3M items/s
Tapeserver 14 MB/s
08:24 DAQ ok, writing to file R43_45
08:39 rate spectra - attachment 4
aida09 spectrum not showing, however continues to collect statistics ok
10:03 System wide checks ok *except*
aida09 fails clock check
aida09 calibration failed
FEE64 temperatures ok - attachment 5
good event statistics ok - attachment 6
detector bias/leakage current ok - attachment 7
10:10 Merger 4.5M items/s
Tapeserver 14 MB/s
data forwarding to MBS ok
10:11 writing to file R43_91
12.00 (LS)
System wide checks:
FEE64 module aida09 global clocks failed, 6
Clock status test result: Passed 11, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
FEE64 module aida09 failed
Calibration test result: Passed 11, Failed 1
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun
calibration for that module
Base Current Difference
aida07 fault 0x829e : 0x829f : 1
White Rabbit error counter test result: Passed 11, Failed 1
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
no FGPA timestamp errors all passed
Statistics (attachment8)
Spectra rate (attachment9), aida09 still does not show histogram, but on run control are enabled for all fees. still
showing good events and other information (temperatures etc)
FEE temps (attachment10)
Leakage currents written to sheets (attachment11)
Merger~4.6M items/s
Tapeserver~14MB/s
12.36 bunch of bad timestamp errors in the new merger terminal (attachment 12) around file R43_152
this error is still occurring at 12.45 will continue to monitor, all other system checks are reporting as normal
13.50 beam down file R43_183
beam back a couple of minutes later
14.00 System wide checks:
FEE64 module aida09 global clocks failed, 6
Clock status test result: Passed 11, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
FEE64 module aida09 failed
Calibration test result: Passed 11, Failed 1
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun
calibration for that module
no white rabbit or FPGA errors all passed
Statistics (attachment13)
Spectra rate (attachment14)
FEE temps (attachment15)
Leakage currents written to sheets (attachment16)
Merger~4.6M items/s
Tapeserver~14MB/s
Writing to MBS okay, still seeing bad timestamp errors in the new merger terminal continuing to monitor and update
statistics tab every 20 to 30 minutes
14.12 Analysed files R43_185,186,187 from timestamp error in ucesb, but see no timewarps
14.30 have not seen any bad timestamp errors in new merger terminal for a while, unsure if something has been changed which
has stopped them
15.25 beam down
15.53 beam back
16.00 moved back to writing to /media/SecondDrive which should last until the end of the experiment
now writing R46
16.10 System wide checks okay except:
FEE64 module aida09 global clocks failed, 6
Clock status test result: Passed 11, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
FEE64 module aida09 failed
Calibration test result: Passed 11, Failed 1
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun
calibration for that module
Statistics (attachment17)
Spectra rate (attachment18)
FEE temps (attachment19)
Leakage currents written to sheets (attachment20)
Merger~4.7M items/s
Tapeserver~14MB/s
Writing to MBS okay |