system wide checks:
Done around 4am.
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To be noted:
-1- White rabbit and FPGA checks failed for 1 FEE and passed for 11
-2- No waveform for AIDA09 in 1.8.L spectrum
-3- AIDA 7 is red in the NewMerger control window (?)
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Details:
Clock status test result: Passed 12, Failed 0
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
Calibration test result: Passed 12, Failed 0
White Rabbit checks:
Base Current Difference
aida07 fault 0xfa8c : 0xfb37 : 171
White Rabbit error counter test result: Passed 11, Failed 1
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
FPGA timestamp check:
Base Current Difference
aida07 fault 0x0 : 0xe : 14
FPGA Timestamp error counter test result: Passed 11, Failed 1
If any of these counts are reported as in error
The ASIC readout system has detected a timeslip.
That is the timestamp read from the time FIFO is not younger than the last
Memory check:
Returned 0 0 0 0 0 0 0 0 0 0 0 0
Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k
aida01 : 45 9 7 3 4 3 2 3 3 3 6 : 36940
aida02 : 23 9 6 7 4 3 2 3 3 3 6 : 36964
aida03 : 40 8 5 4 5 3 2 3 3 3 6 : 36976
aida04 : 37 13 7 3 4 3 4 2 3 3 6 : 36940
aida05 : 35 11 6 3 4 4 2 3 2 4 6 : 38052
aida06 : 42 8 2 3 4 4 2 3 3 3 6 : 36968
aida07 : 42 10 5 5 5 3 2 3 3 3 6 : 37032
aida08 : 40 8 1 6 3 4 2 3 3 3 6 : 36976
aida09 : 18 18 14 8 5 5 5 4 3 2 6 : 36728
aida10 : 1 8 9 6 3 3 1 4 2 3 6 : 36052
aida11 : 24 11 14 6 2 2 4 2 3 3 6 : 36824
aida12 : 17 13 8 5 5 4 2 3 2 3 6 : 36108 |