AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC
Draft saved at 00:00:00
Fields marked with
*
are required
Entry time:
Sun Apr 18 17:27:44 2021
Author
*
:
Subject
*
:
<p>system wide checks at 6pm CET</p> <p>##################################################</p> <p>Difference noted from previous shift:</p> <p>FPGS timestamp error 10 passed and 2 failed</p> <p>##################################################</p> <p><br /> Clock status test result: Passed 12, Failed 0</p> <p>Understand status as follows<br /> Status bit 3 : firmware PLL that creates clocks from external clock not locked<br /> Status bit 2 : always logic '1'<br /> Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br /> Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br /> If all these bits are not set then the operation of the firmware is unreliable</p> <p>ADC Calibration:</p> <p>FEE64 module aida06 failed<br /> FEE64 module aida07 failed<br /> FEE64 module aida10 failed<br /> Calibration test result: Passed 9, Failed 3</p> <p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p> <p>White Rabbit checks:</p> <p> Base Current Difference<br /> aida01 fault 0x7686 : 0x768a : 4 <br /> aida02 fault 0x941d : 0x9421 : 4 <br /> aida03 fault 0x7cd7 : 0x7cdb : 4 <br /> aida04 fault 0xb86d : 0xb871 : 4 <br /> aida05 fault 0x1a59 : 0x1a61 : 8 <br /> aida06 fault 0x4f45 : 0x4f4d : 8 <br /> aida07 fault 0x3bfc : 0x3c11 : 21 <br /> aida08 fault 0xc7ce : 0xc7d5 : 7 <br /> aida09 fault 0xb33b : 0xb33c : 1 <br /> White Rabbit error counter test result: Passed 3, Failed 9</p> <p>Understand the status reports as follows:-<br /> Status bit 3 : White Rabbit decoder detected an error in the received data<br /> Status bit 2 : Firmware registered WR error, no reload of Timestamp<br /> Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p> <p><br /> FPGA timestamp errors checks:</p> <p> Base Current Difference<br /> aida09 fault 0x1 : 0x2 : 1 <br /> aida12 fault 0xa : 0xc : 2 <br /> FPGA Timestamp error counter test result: Passed 10, Failed 2<br /> If any of these counts are reported as in error<br /> The ASIC readout system has detected a timeslip.<br /> That is the timestamp read from the time FIFO is not younger than the last</p> <p>Memory information fro FEE64:</p> <p>Returned 0 0 0 0 0 0 0 0 0 0 0 0 <br /> Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k<br /> aida01 : 27 16 4 2 2 2 1 3 3 3 6 : 36332<br /> aida02 : 19 8 9 3 2 2 2 4 2 3 6 : 36092<br /> aida03 : 23 10 8 6 4 4 3 3 2 3 6 : 36332<br /> aida04 : 27 4 8 0 1 3 4 3 2 3 6 : 36044<br /> aida05 : 21 6 5 4 4 2 2 2 2 4 6 : 37204<br /> aida06 : 23 11 5 0 3 4 1 3 3 3 6 : 36548<br /> aida07 : 14 9 5 2 3 3 2 2 4 3 6 : 37200<br /> aida08 : 26 8 7 2 2 1 4 3 2 3 6 : 35928<br /> aida09 : 2 3 4 1 1 3 3 4 2 3 6 : 36160<br /> aida10 : 16 9 2 5 1 1 3 4 2 3 6 : 36104<br /> aida11 : 7 5 0 0 3 3 1 4 2 3 6 : 35716<br /> aida12 : 9 7 3 2 4 4 1 3 3 3 6 : 36556</p> <p> </p> <p> </p> <p> </p>
Encoding
:
HTML
ELCode
plain
Suppress Email notification
Resubmit as new entry
Attachment 1:
18-04-2021_6pm_CAENHV.png
Original size: 487x336
Attachment 2:
18-04-2021_6pm_StatGoodEvent.png
Original size: 1872x501
Attachment 3:
18-04-2021_6pm_ADCdataItem.png
Original size: 1872x481
Attachment 4:
18-04-2021_6pm_WR28-47#4.png
Original size: 1912x481
Attachment 5:
18-04-2021_6pm_WR48-63#5.png
Original size: 1908x482
Attachment 6:
18-04-2021_6pm_PauseInfo.png
Original size: 1909x477
Attachment 7:
18-04-2021_6pm_ResumeInfo.png
Original size: 1898x471
Attachment 8:
18-04-2021_6pm_DiscInfo.png
Original size: 1905x475
Attachment 9:
18-04-2021_6pm_Correlation#8.png
Original size: 1911x486
Attachment 10:
18-04-2021_6pm_ucesb.png
Original size: 1920x1030
Attachment 11:
18-04-2021_645pm_tempScan.png
Original size: 1884x481
Attachment 12:
18-04-2021_645pm_Spec1-8L.png
Original size: 1886x828
Attachment 13:
18-04-2021_7pm_Spec1-8L_2.png
Original size: 1864x819
Attachment 14:
18-04-2021_7pm_Spec1-8_layoutId4.png
Original size: 1883x821
Attachment 15:
18-04-2021_7pm_Spec1-8H.png
Original size: 1884x874
Attachment 16:
18-04-2021_645pm_SpecRate.png
Original size: 1893x730
Attachment 17:
18-04-2021_730pm_AIDA_LC.png
Original size: 1897x797
Attachment 18:
Drop attachments here...
Draft saved at 00:00:00
ELOG V3.1.4-unknown