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Message ID: 242     Entry time: Sun Apr 18 21:43:01 2021
Author: ML-OH 
Subject: system wide checks 

New System wide check 10pm CET

Clock status test result: Passed 12, Failed 0

Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable

ADC calibration check:

FEE64 module aida06 failed
FEE64 module aida07 failed
FEE64 module aida10 failed
Calibration test result: Passed 9, Failed 3

If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module

   
         Base         Current     Difference
aida01 fault      0x7686 :      0x768a :      4  
aida02 fault      0x941d :      0x9421 :      4  
aida03 fault      0x7cd7 :      0x7cdb :      4  
aida04 fault      0xb86d :      0xb871 :      4  
aida05 fault      0x1a59 :      0x1a61 :      8  
aida06 fault      0x4f45 :      0x4f4d :      8  
aida07 fault      0x3bfc :      0x3c1d :      33  
aida08 fault      0xc7ce :      0xc7d5 :      7  
aida09 fault      0xb33b :      0xb33c :      1  


White Rabbit error counter test result: Passed 3, Failed 9

Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR

FPGA timestamp error checks:

             Base         Current         Difference
aida09 fault      0x1 :      0x2 :      1  
aida12 fault      0xa :      0xf :      5  
FPGA Timestamp error counter test result: Passed 10, Failed 2
If any of these counts are reported as in error
The ASIC readout system has detected a timeslip.
That is the timestamp read from the time FIFO is not younger than the last

Memory from FEE64:
Returned 0 0 0 0 0 0 0 0 0 0 0 0  
Mem(KB) :    4    8    16    32    64    128    256    512    1k    2k    4k
aida01 :     22     19      6      4      2      3      2      4      2      3      6   : 36304
aida02 :     23      9      3      3      1      3      1      4      2      3      6   : 35828
aida03 :     15      5      6      3      2      3      3      3      2      3      6   : 35876
aida04 :     20      8     18      1      1      3      4      3      2      3      6   : 36240
aida05 :     21      7      1      2      1      2      4      3      2      3      6   : 35868
aida06 :     18      8      4      1      3      4      1      3      3      3      6   : 36520
aida07 :      4      9      3      4      2      3      2      2      3      3      6   : 36104
aida08 :     15      5      2      4      2      1      3      4      2      3      6   : 36100
aida09 :      2     23      8      1      2      3      2      4      2      3      6   : 36192
aida10 :     10      7      8      5      2      1      3      3      2      3      6   : 35712
aida11 :      1      9      5      1      2      3      1      4      2      3      6   : 35772
aida12 :     14      8      6      3      3      4      1      3      3      3      6   : 36600

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