<p>03:09 General check</p>
<p>Rates, temptature, voltages are OK attached 1, 2, 3, 4</p>
<p> </p>
<p>****Clock Ckeck******</p>
<p>OK<br />
Clock status test result: Passed 12, Failed 0</p>
<p>Understand status as follows<br />
Status bit 3 : firmware PLL that creates clocks from external clock not locked<br />
Status bit 2 : always logic '1'<br />
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br />
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br />
If all these bits are not set then the operation of the firmware is unreliable</p>
<p>******ADC check ******<br />
FEE64 module aida06 failed<br />
FEE64 module aida07 failed<br />
FEE64 module aida10 failed<br />
Calibration test result: Passed 9, Failed 3</p>
<p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p>
<p>****** White Rabbit check******</p>
<p> Base Current Difference<br />
aida01 fault 0x7686 : 0x768a : 4 <br />
aida02 fault 0x941d : 0x9421 : 4 <br />
aida03 fault 0x7cd7 : 0x7cdb : 4 <br />
aida04 fault 0xb86d : 0xb871 : 4 <br />
aida05 fault 0x1a59 : 0x1a61 : 8 <br />
aida06 fault 0x4f45 : 0x4f4d : 8 <br />
aida07 fault 0x3bfc : 0x3c2c : 48 <br />
aida08 fault 0xc7ce : 0xc7d5 : 7 <br />
aida09 fault 0xb33b : 0xb33c : 1 <br />
White Rabbit error counter test result: Passed 3, Failed 9</p>
<p>Understand the status reports as follows:-<br />
Status bit 3 : White Rabbit decoder detected an error in the received data<br />
Status bit 2 : Firmware registered WR error, no reload of Timestamp<br />
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p>
<p>*****FPGA check ******</p>
<p><br />
Base Current Difference<br />
aida09 fault 0x1 : 0x2 : 1 <br />
aida12 fault 0xa : 0x10 : 6 <br />
FPGA Timestamp error counter test result: Passed 10, Failed 2<br />
If any of these counts are reported as in error<br />
The ASIC readout system has detected a timeslip.<br />
That is the timestamp read from the time FIFO is not younger than the last</p>
<p>*****Memory check*****</p>
<p><br />
Returned 0 0 0 0 0 0 0 0 0 0 0 0 <br />
Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k<br />
aida01 : 6 12 11 7 2 3 2 4 2 3 6 : 36360<br />
aida02 : 21 15 7 3 2 3 1 4 2 3 6 : 35996<br />
aida03 : 9 10 10 2 4 3 3 3 2 3 6 : 36052<br />
aida04 : 17 17 17 4 0 2 3 4 2 3 6 : 36444<br />
aida05 : 25 7 3 1 1 1 2 3 2 4 6 : 37292<br />
aida06 : 29 15 7 2 3 4 1 3 3 3 6 : 36700<br />
aida07 : 17 17 6 5 2 3 2 3 3 3 6 : 36812<br />
aida08 : 22 6 10 5 3 1 3 4 2 3 6 : 36360<br />
aida09 : 18 28 14 4 2 3 3 3 2 3 6 : 36232<br />
aida10 : 26 16 4 3 3 1 3 4 2 3 6 : 36296<br />
aida11 : 16 10 4 0 3 3 1 4 2 3 6 : 35856<br />
aida12 : 19 14 4 2 4 4 1 3 3 3 6 : 36668</p>
<p> </p>
<p>04:15 General Check</p>
<p>Rates, Tempratures, Voltages are ok, attached 5,6,7,8</p>
<p>******Clock Check*******</p>
<p>OK</p>
<p>Clock status test result: Passed 12, Failed 0</p>
<p>Understand status as follows<br />
Status bit 3 : firmware PLL that creates clocks from external clock not locked<br />
Status bit 2 : always logic '1'<br />
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br />
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br />
If all these bits are not set then the operation of the firmware is unreliable</p>
<p> </p>
<p>******ADC******</p>
<p>Clock status test result: Passed 12, Failed 0</p>
<p>Understand status as follows<br />
Status bit 3 : firmware PLL that creates clocks from external clock not locked<br />
Status bit 2 : always logic '1'<br />
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br />
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br />
If all these bits are not set then the operation of the firmware is unreliable</p>
<p> </p>
<p>******White Rabbit check******</p>
<p><br />
Base Current Difference<br />
aida01 fault 0x7686 : 0x768a : 4 <br />
aida02 fault 0x941d : 0x9421 : 4 <br />
aida03 fault 0x7cd7 : 0x7cdb : 4 <br />
aida04 fault 0xb86d : 0xb871 : 4 <br />
aida05 fault 0x1a59 : 0x1a61 : 8 <br />
aida06 fault 0x4f45 : 0x4f4d : 8 <br />
aida07 fault 0x3bfc : 0x3c39 : 61 <br />
aida08 fault 0xc7ce : 0xc7d5 : 7 <br />
aida09 fault 0xb33b : 0xb33c : 1 <br />
White Rabbit error counter test result: Passed 3, Failed 9</p>
<p>Understand the status reports as follows:-<br />
Status bit 3 : White Rabbit decoder detected an error in the received data<br />
Status bit 2 : Firmware registered WR error, no reload of Timestamp<br />
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p>
<p><br />
******FPGA Check******</p>
<p> Base Current Difference<br />
aida09 fault 0x1 : 0x2 : 1 <br />
aida12 fault 0xa : 0x11 : 7 <br />
FPGA Timestamp error counter test result: Passed 10, Failed 2<br />
If any of these counts are reported as in error<br />
The ASIC readout system has detected a timeslip.<br />
That is the timestamp read from the time FIFO is not younger than the last</p>
<p><br />
****** Memorey check******</p>
<p><br />
Returned 0 0 0 0 0 0 0 0 0 0 0 0 <br />
Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k<br />
aida01 : 27 21 10 7 1 3 2 4 2 3 6 : 36436<br />
aida02 : 28 21 3 3 1 3 1 4 2 3 6 : 35944<br />
aida03 : 15 8 11 3 3 3 3 3 2 3 6 : 36044<br />
aida04 : 25 19 14 4 1 3 4 3 2 3 6 : 36380<br />
aida05 : 12 6 5 1 0 2 2 3 2 4 6 : 37328<br />
aida06 : 29 21 4 2 3 4 1 3 3 3 6 : 36700<br />
aida07 : 19 14 7 6 2 3 2 2 3 3 6 : 36332<br />
aida08 : 11 8 8 6 3 1 3 4 2 3 6 : 36332<br />
aida09 : 16 25 11 3 1 2 2 4 2 3 6 : 36184<br />
aida10 : 14 13 4 2 3 2 2 4 2 3 6 : 36064<br />
aida11 : 4 9 4 0 3 3 1 4 2 3 6 : 35800<br />
aida12 : 38 17 4 2 4 4 1 3 3 3 6 : 36768</p>
<p> </p>
<p> </p>
<p> </p>
<p> </p> |