ELOG DESPEC

AIDA GELINA BRIKEN nToF CRIB ISOLDE CIRCE nTOFCapture DESPEC DTAS EDI_PSA 179Ta CARME StellarModelling DCF K40

DESPEC

Fields marked with * are required
Entry time:	Sat Mar 29 11:29:12 2025
Author*:
Subject*:
> 23:52 Noticed AIDA07 has dropped out of the merger and is producing no statistics > Powercycling to recover > > 00:14 All FEEs recovered from powercycle > aida09 running again at HEC threshold of 0x2 (Was set to 0x1 earlier in the day while testing the HEC event disparity in DSSD3) > Now writing to R34 > Following the powercycle the rates in the FEEs are much improved and back to where they were before the 08:30 crash on the 19th. - Attachment 1 > Waveforms also look improved - attachmens 2 and 3 > > > Current system parameters > ASIC settings Dec19 (All LEC comparator 0xa) > Pulser at 2V and 2Hz > DSSD 1 and 2 Bias 160V > DSSD 3 at 120V (Will lower to 100 again during the beam off period tomorrow) > > > > 00:28 In analysis of R34_13 the number of HEC items in DSSD3 appears to make sense again. The number in aida09 are consistent with the number in aida05 and the same for aida11 and aida07. > This appears to confirm that the earlier HEC issues we were observing were hardware related but we are unsure what/why/how these issues were caused. > Analysis - attachment 4 > > 00:40 Issue with one of the FRS magnets so they stop recording data. Leaving AIDA running. > > 01:08 While beam was down have reset DSSD3 bias to 100V as was agreed with Tom and Nic in email > Leakage current decreased as expected - attachment 5 > Once beam is back will check HEC still as expected. > > 01:14 Last magnet in FRS has an issue with the water flowing. Either sensor issue or water flow is to low. > Hakke have increased the water flow to hopefully keep the water running. > Beam is back. > > From ucesb it seems that the HEC events in DSSD3 are still appearing as expected. Will check a file once we have a complete file. > Checked R34_36 and the HEC events in DSSD3 are still consistent - attachment 6 > > 2:20 Statistics ok - attachment 7 > Temp - attachment 8 > Bias and leakage current ok - attachment 9 > > All system wide checks ok except for WR error check: > > Base Current Difference > aida07 fault 0x9154 : 0x915b : 7 > aida10 fault 0x8d3 : 0x8d3 : 0 > aida10 : WR status 0x10 > White Rabbit error counter test result: Passed 10, Failed 2 > > Understand the status reports as follows:- > Status bit 3 : White Rabbit decoder detected an error in the received data > Status bit 2 : Firmware registered WR error, no reload of Timestamp > Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR > > Note aida07 reports two bad timestamps in the merger > MERGE Data Link (3762): bad timestamp 6 3 0xc1817ea7 0x04a8fc66 0x0000683974a8fc66 0x1677683974a8fc66 0x167768397a546a56 > MERGE Data Link (3762): bad timestamp 6 3 0xc1b77e25 0x04a8fc66 0x0000683974a8fc66 0x1677683974a8fc66 0x167768397a546a56 > > > 02:25 Remembered during a pre-experiment meeting with Vic, Patrick and Carl they mentioned the merger would track timestamp sequence errors > Can confirm this is true. Can see the two in aida07 in the counter in the merger stats page - attachment 10 > > 02:45 Now up to 7 timestamp errors on aida07 in the merger > > 02:49 Ran R34_45 through AIDASort - It reports a greater number of implant events are able to have a front back match performed > Ratio between aida07 and 09 is 0.71 -> Double what it was before > Energy response of the HEC channels in aida07 and aida09 looks equivalent (left group aida09 right group aida11) - attahchment 11 > > 04:40 Statistics ok - attachment 12 > Temperatures ok - attachment 13 > Bias and leakage currents - attachment 14 > Clock status, ADC calibration and memory infomration all ok > aida07 fails both WR and FPGA > > Base Current Difference > aida07 fault 0x915b : 0x9161 : 6 > aida10 fault 0x8d3 : 0x8d3 : 0 > aida10 : WR status 0x10 > White Rabbit error counter test result: Passed 10, Failed 2 > > Understand the status reports as follows:- > Status bit 3 : White Rabbit decoder detected an error in the received data > Status bit 2 : Firmware registered WR error, no reload of Timestamp > Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR > > > Base Current Difference > aida07 fault 0x0 : 0x1 : 1 > FPGA Timestamp error counter test result: Passed 11, Failed 1 > If any of these counts are reported as in error > The ASIC readout system has detected a timeslip. > That is the timestamp read from the time FIFO is not younger than the last > > > TS errors in the merger still only at 7 with all in aida07 > > 06:25 Statistics - attachment 15 > Temps ok - attachment 16 > Bias and leakage currents ok - attachment 17 > > System wide checks: clock status, adc calibration and memory information all ok > WR multiple fails > > Base Current Difference > aida05 fault 0xc9ca : 0xc9cb : 1 > aida06 fault 0xe900 : 0xe901 : 1 > aida07 fault 0x915b : 0x9166 : 11 > aida08 fault 0x641e : 0x641f : 1 > aida10 fault 0x8d3 : 0x8d3 : 0 > aida10 : WR status 0x10 > White Rabbit error counter test result: Passed 7, Failed 5 > > Understand the status reports as follows:- > Status bit 3 : White Rabbit decoder detected an error in the received data > Status bit 2 : Firmware registered WR error, no reload of Timestamp > Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR > > FPGA aida07 fails with difference of 1 > > No new TS sequence errors in merger > > > 07:10 Beam has dropped out. > 07:14 Beam is back Encoding: HTML ELCode plain Suppress Email notification

Attachment 1:
Drop attachments here...

ELOG V3.1.4-unknown