AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC
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Entry time:
Sat Mar 29 11:32:04 2025
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<p> <table width="98%" align="center" cellspacing="1" style="border:1px solid #486090;"> <tbody> <tr> <td cellpadding="3px" style="background-color:#486090; font-weidht:bold; color:white;">Quote:</td></tr> <tr> <td cellpadding="10px" style="background-color:#FFFFB0;"><p><strong>08:30</strong></p> <p><strong>System Checks</strong></p> <p> </p> <p><strong>Clock Status error</strong>:</p> <p>FEE64 module aida06 global clocks failed, 6<br /> Clock status test result: Passed 11, Failed 1</p> <p>Understand status as follows<br /> Status bit 3 : firmware PLL that creates clocks from external clock not locked<br /> Status bit 2 : always logic '1'<br /> Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br /> Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br /> If all these bits are not set then the operation of the firmware is unreliable</p> <p><strong>ADC Calibration error:</strong></p> <p>FEE64 module aida06 failed<br /> FEE64 module aida07 failed<br /> FEE64 module aida12 failed<br /> Calibration test result: Passed 9, Failed 3</p> <p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p> <p><strong>White Rabbit Decoder Status error:</strong></p> <p><br /> Base Current Difference<br /> aida06 fault 0x679f : 0x67a2 : 3 <br /> White Rabbit error counter test result: Passed 11, Failed 1</p> <p>Understand the status reports as follows:-<br /> Status bit 3 : White Rabbit decoder detected an error in the received data<br /> Status bit 2 : Firmware registered WR error, no reload of Timestamp<br /> Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p> <p><strong>FPGA Timestamp error:</strong></p> <p>Showed larger error message begining 'Got the error <strong>Server Internal Error</strong><br /> while trying to obtain <strong>/AIDA/Check/Check.tml</strong>.'</p> <p> </p> <p>Statistics - See attacnment 1</p> <p>Temperatures - See attachment 2</p> <p>Bias & Leakage Currents - See attachment 3</p> <p> </p> <p><strong>10:02</strong></p> <p><strong>System Checks:</strong></p> <p><strong>Clock Status Error:</strong></p> <p>FEE64 module aida06 global clocks failed, 6<br /> Clock status test result: Passed 11, Failed 1</p> <p>Understand status as follows<br /> Status bit 3 : firmware PLL that creates clocks from external clock not locked<br /> Status bit 2 : always logic '1'<br /> Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br /> Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br /> If all these bits are not set then the operation of the firmware is unreliable</p> <p><strong>ADC Calibration Error:</strong></p> <p> <br /> FEE64 module aida06 failed<br /> FEE64 module aida07 failed<br /> FEE64 module aida12 failed<br /> Calibration test result: Passed 9, Failed 3</p> <p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p> <p><strong>White Rabbit Decoder Status Error:</strong></p> <p> Base Current Difference<br /> aida06 fault 0x679f : 0x67a2 : 3 <br /> White Rabbit error counter test result: Passed 11, Failed 1</p> <p>Understand the status reports as follows:-<br /> Status bit 3 : White Rabbit decoder detected an error in the received data<br /> Status bit 2 : Firmware registered WR error, no reload of Timestamp<br /> Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p> <p><strong>FPGA Timestamp error:</strong></p> <p>Showed larger error message begining 'Got the error <strong>Server Internal Error</strong><br /> while trying to obtain <strong>/AIDA/Check/Check.tml</strong>.'</p> <p>Statistics - See attacnment 4</p> <p>Temperatures - See attachment 5</p> <p>Bias & Leakage Currents - See attachment 6</p> <p> </p> <p><strong>10:45</strong></p> <p><strong>System Checks</strong></p> <p><strong>Clock Status Error:</strong></p> <p><br /> FEE64 module aida06 global clocks failed, 6<br /> Clock status test result: Passed 11, Failed 1</p> <p>Understand status as follows<br /> Status bit 3 : firmware PLL that creates clocks from external clock not locked<br /> Status bit 2 : always logic '1'<br /> Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br /> Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br /> If all these bits are not set then the operation of the firmware is unreliable</p> <p><br /> <strong>ADC Calibration check Error:</strong></p> <p><br /> FEE64 module aida06 failed<br /> FEE64 module aida07 failed<br /> FEE64 module aida12 failed<br /> Calibration test result: Passed 9, Failed 3</p> <p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p> <p><strong>White Rabbit Decoder Status Error:</strong></p> <p> Base Current Difference<br /> aida06 fault 0x679f : 0x67a2 : 3 <br /> White Rabbit error counter test result: Passed 11, Failed 1</p> <p>Understand the status reports as follows:-<br /> Status bit 3 : White Rabbit decoder detected an error in the received data<br /> Status bit 2 : Firmware registered WR error, no reload of Timestamp<br /> Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p> <p><strong>FPGA Timestamp error:</strong></p> <p>Showed larger error message begining 'Got the error <strong>Server Internal Error</strong><br /> while trying to obtain <strong>/AIDA/Check/Check.tml</strong>.'</p> <p>Statistics - See attacnment 7</p> <p>Temperatures - See attachment 8</p> <p>Bias & Leakage Currents - See attachment 9</p> <p> </p></td> </tr> </tbody> </table> </p><p> </p>
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