14.15 System wide checks
FEE64 module aida06 global clocks failed, 6
Clock status test result: Passed 11, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
FEE64 module aida06 failed
FEE64 module aida07 failed
FEE64 module aida12 failed
Calibration test result: Passed 9, Failed 3
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module
Base Current Difference
aida06 fault 0x679f : 0x67a2 : 3
White Rabbit error counter test result: Passed 11, Failed 1
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
FPGA timestamp errors - reports 'server internal error'
14.16 DSSSD bias & leakage currents OK - attachment 1
FEE64 temps OK - attachment 2
good events stats - attachment 3
14.22 DAQ continues file S460/R51_205
beam intensity 2.2e+09/s
15:53 system check
Rates, Temperatures, Voltages are ok and attached 4,5,6
Clock check
FEE64 module aida06 global clocks failed, 6
Clock status test result: Passed 11, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
ADC check
FEE64 module aida06 failed
FEE64 module aida07 failed
FEE64 module aida12 failed
Calibration test result: Passed 9, Failed 3
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module
White Rabbit
Base Current Difference
aida06 fault 0x679f : 0x67a2 : 3
White Rabbit error counter test result: Passed 11, Failed 1
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
FPGA
Loge page error!
Memory check
Returned 0 0 0 0 0 0 0 0 0 0 0 0
Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k
aida01 : 23 6 2 1 2 3 2 4 2 3 6 : 36044
aida02 : 15 3 2 2 0 3 2 3 2 3 4 : 27188
aida03 : 29 4 0 3 2 4 2 2 3 3 6 : 36212
aida04 : 4 6 4 4 2 3 3 3 3 3 6 : 36864
aida05 : 19 5 4 2 3 3 1 3 3 3 6 : 36404
aida06 : 24 9 5 2 3 3 3 2 3 3 6 : 36472
aida07 : 20 4 9 0 2 3 2 2 3 3 6 : 36096
aida08 : 22 9 4 3 1 3 1 3 3 3 6 : 36352
aida09 : 20 7 3 2 2 3 3 2 3 3 6 : 36344
aida10 : 25 9 9 5 2 3 2 3 3 3 6 : 36828
aida11 : 24 11 2 0 1 3 1 3 3 3 6 : 36248
aida12 : 26 5 4 2 1 3 2 2 3 3 6 : 36048 |