AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC
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Entry time:
Sat Mar 29 11:32:14 2025
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<p> <table width="98%" align="center" cellspacing="1" style="border:1px solid #486090;"> <tbody> <tr> <td cellpadding="3px" style="background-color:#486090; font-weidht:bold; color:white;">Quote:</td></tr> <tr> <td cellpadding="10px" style="background-color:#FFFFB0;"><p>Wide checks at Time 22:22 CET</p> <p>Clock status test result: Passed 16, Failed 0</p> <p>Understand status as follows<br /> Status bit 3 : firmware PLL that creates clocks from external clock not locked<br /> Status bit 2 : always logic '1'<br /> Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br /> Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br /> If all these bits are not set then the operation of the firmware is unreliable</p> <p>FEE64 module aida01 failed<br /> FEE64 module aida02 failed<br /> FEE64 module aida03 failed<br /> FEE64 module aida04 failed<br /> FEE64 module aida05 failed<br /> FEE64 module aida06 failed<br /> FEE64 module aida07 failed<br /> FEE64 module aida08 failed<br /> FEE64 module aida09 failed<br /> FEE64 module aida10 failed<br /> FEE64 module aida11 failed<br /> FEE64 module aida12 failed<br /> FEE64 module aida13 failed<br /> FEE64 module aida14 failed<br /> FEE64 module aida15 failed<br /> FEE64 module aida16 failed<br /> Calibration test result: Passed 0, Failed 16</p> <p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p> <p><br /> Base Current Difference<br /> aida01 fault 0xf932 : 0xf933 : 1 <br /> aida02 fault 0x62ec : 0x62ed : 1 <br /> aida03 fault 0x8679 : 0x867a : 1 <br /> aida04 fault 0xf0e4 : 0xf0e5 : 1 <br /> aida05 fault 0x9db8 : 0x9dbc : 4 <br /> aida06 fault 0x7f18 : 0x7f19 : 1 <br /> aida07 fault 0xdd2c : 0xdd2d : 1 <br /> aida08 fault 0x1557 : 0x1558 : 1 <br /> White Rabbit error counter test result: Passed 8, Failed 8</p> <p>Understand the status reports as follows:-<br /> Status bit 3 : White Rabbit decoder detected an error in the received data<br /> Status bit 2 : Firmware registered WR error, no reload of Timestamp<br /> Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p> <p> Base Current Difference<br /> aida05 fault 0x0 : 0x2 : 2 <br /> FPGA Timestamp error counter test result: Passed 15, Failed 1<br /> If any of these counts are reported as in error<br /> The ASIC readout system has detected a timeslip.<br /> That is the timestamp read from the time FIFO is not younger than the last</p> <p><br /> Returned 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 <br /> Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k<br /> aida01 : 35 11 3 5 5 4 1 3 2 4 6 : 37876<br /> aida02 : 20 5 4 3 2 5 2 4 3 3 6 : 37400<br /> aida03 : 20 3 4 3 4 4 1 3 2 4 6 : 37640<br /> aida04 : 25 6 2 3 4 4 3 3 3 3 6 : 37140<br /> aida05 : 30 10 5 7 2 6 2 4 2 4 6 : 38776<br /> aida06 : 21 11 4 4 3 5 2 4 3 3 6 : 37548<br /> aida07 : 23 8 4 4 2 6 1 3 2 4 6 : 37852<br /> aida08 : 27 7 2 3 4 3 2 4 3 3 6 : 37284<br /> aida09 : 31 6 5 6 3 3 2 4 3 3 6 : 37372<br /> aida10 : 22 5 3 4 3 6 2 2 2 4 6 : 37616<br /> aida11 : 23 5 4 2 5 2 1 3 2 4 6 : 37444<br /> aida12 : 20 7 4 7 3 5 2 3 3 3 6 : 37096<br /> aida13 : 28 5 3 3 1 5 2 3 3 3 6 : 36840<br /> aida14 : 38 12 2 4 2 4 1 4 3 3 6 : 37144<br /> aida15 : 27 9 5 4 2 5 3 2 3 3 6 : 36740<br /> aida16 : 21 6 4 4 1 4 2 3 3 3 6 : 36740</p> <p> </p></td> </tr> </tbody> </table> </p><p> </p>
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