AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC
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Sat Mar 29 11:27:06 2025
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<p> <table width="98%" align="center" cellspacing="1" style="border:1px solid #486090;"> <tbody> <tr> <td cellpadding="3px" style="background-color:#486090; font-weidht:bold; color:white;">Quote:</td></tr> <tr> <td cellpadding="10px" style="background-color:#FFFFB0;"><p>System Wide check at begining of the night shift:</p> <p>-----</p> <p>Clock status test result: Passed 16, Failed 0</p> <p>Understand status as follows<br /> Status bit 3 : firmware PLL that creates clocks from external clock not locked<br /> Status bit 2 : always logic '1'<br /> Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br /> Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br /> If all these bits are not set then the operation of the firmware is unreliable</p> <p>-----</p> <p>ADC calibration:<br /> FEE64 module aida01 failed<br /> FEE64 module aida02 failed<br /> FEE64 module aida03 failed<br /> FEE64 module aida04 failed<br /> FEE64 module aida05 failed<br /> FEE64 module aida06 failed<br /> FEE64 module aida07 failed<br /> FEE64 module aida08 failed<br /> FEE64 module aida09 failed<br /> FEE64 module aida10 failed<br /> FEE64 module aida11 failed<br /> FEE64 module aida12 failed<br /> FEE64 module aida13 failed<br /> FEE64 module aida14 failed<br /> FEE64 module aida15 failed<br /> FEE64 module aida16 failed<br /> Calibration test result: Passed 0, Failed 16</p> <p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p> <p>-----</p> <p>White rabbit status:</p> <p> Base Current Difference<br /> aida05 fault 0x500 : 0x56d : 109 <br /> White Rabbit error counter test result: Passed 15, Failed 1</p> <p>Understand the status reports as follows:-<br /> Status bit 3 : White Rabbit decoder detected an error in the received data<br /> Status bit 2 : Firmware registered WR error, no reload of Timestamp<br /> Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p> <p>-----</p> <p>FPGA Timestamp error counter test result: Passed 16, Failed 0<br /> If any of these counts are reported as in error<br /> The ASIC readout system has detected a timeslip.<br /> That is the timestamp read from the time FIFO is not younger than the last</p> <p>-----</p> <p>Memory info from FEE cards</p> <p>Returned 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 <br /> Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k<br /> aida01 : 20 7 7 6 1 5 2 2 3 3 6 : 36472<br /> aida02 : 19 5 4 4 4 3 3 3 2 3 6 : 36020<br /> aida03 : 22 10 2 2 5 2 2 3 3 3 6 : 36680<br /> aida04 : 12 7 1 0 4 3 1 4 3 3 6 : 36856<br /> aida05 : 16 7 5 3 1 3 2 3 3 3 6 : 36584<br /> aida06 : 20 7 5 6 2 4 4 2 3 3 6 : 36888<br /> aida07 : 13 7 5 2 3 2 1 3 2 2 7 : 37308<br /> aida08 : 18 7 5 3 0 2 3 3 3 3 6 : 36656<br /> aida09 : 21 6 4 4 1 4 2 3 3 3 6 : 36740<br /> aida10 : 21 10 2 3 2 3 2 2 2 4 6 : 37156<br /> aida11 : 23 2 4 4 3 2 2 3 2 4 6 : 37612<br /> aida12 : 24 1 4 3 2 2 1 2 4 3 6 : 36744<br /> aida13 : 26 9 4 2 1 4 3 2 3 3 6 : 36464<br /> aida14 : 19 9 9 2 3 4 1 2 2 4 6 : 37156<br /> aida15 : 10 7 10 0 1 3 1 3 3 3 6 : 36288<br /> aida16 : 28 7 3 2 1 3 3 3 3 3 6 : 36824</p></td> </tr> </tbody> </table> </p><p> </p>
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