AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC
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Sat Mar 29 11:27:12 2025
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<p> <table width="98%" align="center" cellspacing="1" style="border:1px solid #486090;"> <tbody> <tr> <td cellpadding="3px" style="background-color:#486090; font-weidht:bold; color:white;">Quote:</td></tr> <tr> <td cellpadding="10px" style="background-color:#FFFFB0;"><p>System wide checks at 7am CET</p> <p>All seems fine, nothing significant to report</p> <p>Slight increase of dead time noted in FEE 3, 5 and 7.</p> <p>-----<br /> Clock status test result: Passed 16, Failed 0</p> <p>Understand status as follows<br /> Status bit 3 : firmware PLL that creates clocks from external clock not locked<br /> Status bit 2 : always logic '1'<br /> Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock<br /> Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock<br /> If all these bits are not set then the operation of the firmware is unreliable</p> <p>-----</p> <p>ADC calibration</p> <p>FEE64 module aida01 failed<br /> FEE64 module aida02 failed<br /> FEE64 module aida03 failed<br /> FEE64 module aida04 failed<br /> FEE64 module aida05 failed<br /> FEE64 module aida06 failed<br /> FEE64 module aida07 failed<br /> FEE64 module aida08 failed<br /> FEE64 module aida09 failed<br /> FEE64 module aida10 failed<br /> FEE64 module aida11 failed<br /> FEE64 module aida12 failed<br /> FEE64 module aida13 failed<br /> FEE64 module aida14 failed<br /> FEE64 module aida15 failed<br /> FEE64 module aida16 failed<br /> Calibration test result: Passed 0, Failed 16</p> <p>If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module</p> <p><br /> -----</p> <p>White Rabbit:</p> <p> Base Current Difference<br /> aida05 fault 0x500 : 0x56e : 110 <br /> White Rabbit error counter test result: Passed 15, Failed 1</p> <p>Understand the status reports as follows:-<br /> Status bit 3 : White Rabbit decoder detected an error in the received data<br /> Status bit 2 : Firmware registered WR error, no reload of Timestamp<br /> Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR</p> <p>-----</p> <p>FPGA Timestamp error counter test result: Passed 16, Failed 0<br /> If any of these counts are reported as in error<br /> The ASIC readout system has detected a timeslip.<br /> That is the timestamp read from the time FIFO is not younger than the last</p> <p>-----</p> <p>Returned 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 <br /> Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k<br /> aida01 : 23 5 6 5 0 4 1 3 3 3 6 : 36484<br /> aida02 : 10 3 3 2 3 2 2 2 3 3 6 : 35952<br /> aida03 : 2 5 1 4 5 2 2 3 3 3 6 : 36608<br /> aida04 : 1 3 4 0 4 3 2 3 3 3 6 : 36572<br /> aida05 : 19 9 3 2 2 3 1 3 4 3 6 : 37380<br /> aida06 : 13 11 1 5 3 4 4 2 3 3 6 : 36860<br /> aida07 : 12 2 4 3 3 2 1 3 2 2 7 : 37280<br /> aida08 : 25 5 7 1 1 3 3 3 3 3 6 : 36828<br /> aida09 : 22 5 6 4 1 3 2 3 3 3 6 : 36640<br /> aida10 : 23 8 6 3 2 3 2 2 2 4 6 : 37212<br /> aida11 : 24 14 7 3 3 2 3 3 3 3 6 : 36960<br /> aida12 : 16 10 5 3 1 2 1 2 4 3 6 : 36736<br /> aida13 : 23 6 4 2 2 3 2 3 3 3 6 : 36620<br /> aida14 : 22 7 8 4 3 4 1 2 2 4 6 : 37200<br /> aida15 : 10 12 9 2 1 3 1 3 3 3 6 : 36376<br /> aida16 : 18 5 6 2 0 3 2 4 3 3 6 : 37008</p> <p> </p></td> </tr> </tbody> </table> </p><p> </p>
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