AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC
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Sat Mar 29 11:41:52 2025
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DSSSD bias OFF. DAQ STOPped Attachment 1 FEE64 temps OK Attachment 2 system wide checks OK *except* WR decoder (attachment 2) and FPGA ts errors no longer works Attachment 6 System wide check - 'Synchronise ASIC clocks' Attachment 5 System wide check - check ADC calibration - all 16x FEE64s fail Attachment 4 System wide check - WR decoder status - aida09 WR status 0x10 clears Repeat Synchronsie ASIC clocks Attachment 3 System wide check - WR decoder status - aida05 WR status 0x10 clears
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