AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC
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Sat Mar 29 11:32:32 2025
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> Proposed FEE numbering and wiring plan for upcoming experiment S100 (2x Wide DSSSDs) > > Image designed in draw.io, source attached > > FEE numbering is as S450, minimises cable movement from S505/Narrow AIDA > But means merger is not working with 1 DSSD (until all FEEs installed) > > Wiring of adapter boards as from noise tests and what should work for DSSD bias > LK3 on middle bottom adapter to ground DSSD > LK1 on one n+n adapter to ground n+n side bias > p+n has -ve voltage (w.r.t. ground) bias applied via lower adapter boards > ground loop grounds all adapter boards, except 2 p+n adapter boards which are grounded by the bias lemo shield instead > > MACB layout also included, with expected NIM logic signals for the aida scalers: > > 1: Pulser/Sync clock (send to all subsystems, "trigger 3")0 > > 3/4: Time Machine > 5/6: SC41L/R > > All other FEEs have their scaler available > (Scaler should be in left LEMO on MACB, right is output (AIDA->NIM/unused), bottom 4 are triggers from AIDA (unused) > > Test circuit will not be used in experiment due to noise, but can be temporarily set up for pulser walkthrough > > Revision 2 correct as of 27 March 2023
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