ELOG DESPEC

AIDA GELINA BRIKEN nToF CRIB ISOLDE CIRCE nTOFCapture DESPEC DTAS EDI_PSA 179Ta CARME StellarModelling DCF K40

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Entry time:	Sat Mar 29 20:13:04 2025
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12.00 Replaced AIDA ASIC mezzanine of aida01 to fix issue with asic #3 During replacement the HDMI connector of the adjacent FEE64 aida09 became disconnected from the FEE64 PCB aida09 ( MAC ee:10 ) replaced (MAC 41:cf:ad ) AIDA FEE64 adaptor PCBs for aida01, aida14 and aida09 disconnected and re-connected during this process DSSSD bias & leakage current OK - attachment 1 FEE64 temps OK - attachment 2 except aida02 ASIC temp - known fault System wide checks OK except WR/FPGA errors - attachments 3-4 WR timestamps OK - attachment 5 ADC, DISC, PAUSE, RESUME and correlation data stats - attachments 6-10 ADC data items 10/16 < 20k, max 143k per FEE64 Rate spectra - attachment 11 per FEE64 1.8.W spectra - 20us FSR - attachments 12-13 15.10 Synchronise ASIC clocks Re-calibrate ALL ADCs ASIC settings 2024Mar27-11.25.32 Changes ( https://elog.ph.ed.ac.uk/CARME/499 ) IBias LF feedback from 0xf to 0x8 Diode link threshold from 0xbf to 0xca New ASIC settings saved as 2024Apr19-15.22.49 All FEE64 slow comparators -> 0x14 Data file S100_alpha/R12 Pulser ealkthrough (test +) BNC PB-5 settings Amplitude 10.0-1.0V @ 1.0V step Attenuation x10 Frequency 25Hz Polarity + Tail pulse tau_d 1ms 16.35 DAQ ends OK file S100_alpha/R12_24 per p+n FEE64 1.8.L spectra - attachment 14 aida09 pulser peak width 54 ch FWHM 17.38 Data file S100_alpha/R13 Pulser walkthrough (test -) BNC PB-5 settings Amplitude 10.0-1.0V @ 1.0V step Attenuation x10 Frequency 25Hz Polarity - Tail pulse tau_d 1ms 18.43 DAQ ends OK file S100_alpha/R13_20 per p+n FEE64 1.8.L spectra - attachment 15 18.55 Current status FEE64 power ON DSSSD bias ON All FEE64 slow comparator 0x14 DAQ going -> Merger -> TapeServer (no storage mode) -> MBS ( but data stream not yet being read by MBS ) To Do - S4 currently closed/controlled access for FRS startup If we have access to S4 tomorrow - switch test - to test + ( not critical ) - test AIDA interlock - further alpha background? 22.47 DSSSD bias & leakage current OK - attachments 16-17 FEE64 temps OK - attachment 18 except aida02 ASIC temp - known fault ADC data item stats - attachment 19 per FEE64 Rate spectra - attachment 20 Data link, Tape Server & Merger - attachments 21-23 Encoding: HTML ELCode plain Suppress Email notification

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