Detector configuration - see https://elog.ph.ed.ac.uk/AIDA/193

Ribbon cable to nnaida19 FEE adaptor PCB disconnected due to noise issues
associated with nnaida19 or crate slot or power/timestamp/network cabling
to nnaida19 - to be investigated May 22-

207Bi source ~3cm upstream of DSSSD #1

rate and hit rate spectra for all FEE64s - see attachments 1-4

example ADC spectra for all FEE64s - attachment 5 p+n strips, attachment 6 n+n strips

Default ASIC settings, shaping time 8us (which may, or may not, be optimum - to be 
investigated May 22- )

      p+n junction strips       n+n ohmic strips
FEE64 Pulser peak width   FEE64 Pulser peak width
      (ch FWHM)                 (ch FWHM)
1     108                 3      88
2      64                 4      84
5     112                 7      76
6       -                 8      85
9      75                 11    122
10     82                 12     98
13     84                 15    127
14     99                 16    115
17     77                 19      ?
18     69                 20    100
21     77                 23     89
22     91                 24     84
25     80                 27    138
26     14                 28     16   } not connected to DSSSD
29     17                 31     17   }
30     130                32    111

DSSSD bias voltages and leakage currents - attachments 7-8
All bias voltages +100V cf. depletion ~70V for 3058 sequence (MSL type BB18)
Additional bias may be helpful (to be investigated May 22-)