AIDA GELINA BRIKEN nToF CRIB ISOLDE CIRCE nTOFCapture DESPEC DTAS EDI_PSA 179Ta CARME StellarModelling DCF K40
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Message ID: 24     Entry time: Wed Jan 28 16:12:52 2015
Author: Tom Davinson 
Subject: AIDA Tests at STFC DL - 27-28.1.15 - TD & PCS 
MSL type BB18-1000 2998-22 bias +200V I_L +3.52uA


Detector bias CAEN N1419 Programmable HV Power Supply
  - FAGND isolated from AGND (AGND = NIM chassis ground)
  - floating HV supply, <5mV pp noise specification
  - configured + polarity, i.e. core to nnaida11 & nnaida12 MSL type BB18 n+n ohmic strips
                                braid to nnaida12 & nnaida13 MSL type BB18 p+n junction strips
  - configured bias voltage to 200V, max bias voltage 200V, max leakage current 20uA,
    trip 10s, ramp up/down 1V/s


BNC PB-5

amp 0.5V
atten x1
tau_d 1ms
freq 100Hz
pol - (output split via EG&G Ortec 433A to generate + polarity too)


PSU

Standard AIDA FEE64 PSU + new filter PCBs


Adaptor

nnaida11 & nnaida12 - polarity input (n+n ohmic strips)
  MSL type BB18 adaptor PCB rev 180713 LK 3 & 7
nnaida13 & nnaida14 + polarity input (p+n junction strips)
  MSL type BB18 adaptor PCB rev 290114 LK 1, 3, 5 & 7

+/- test inputs terminated by 50 Ohm

DSSSD grounded locally at nnaida12 & nnaida13 adaptor PCBs
by ground links LK 1 & 5

Adaptor PCB grounds connected by thick copper braid (see attached images)

FEE64

nnaida11 2b:09:ce
nnaida12 2b:09:e8
nnaida13 2b:09:07
nnaida14 2b:22:55

FEE firmware release 0x16cee018


ASIC parameters

  Default ASIC parameters (EXPERIMENT/AIDA/2014Aug13-13.44.58) except
  - shaping time 2us
  - slow comparator 64 (hex 40)
  - nnaida11 & nnaida12 preAmp reference 0x30 -> 0x38
    which will reduce linear output range but significantly stabilises
    negative polarity input ASICs


Typical pulser peak widths for nnaida11, 12, 13 and 14 c. 130-150ch FWHM.
Without the copper braid connecting the two adaptor PCBs the peak widths
are typically 200-250ch FWHM.



The problem observed last week (leakage current > 20uA, bias c. 3V, i.e. an
apparent 150k short) was found to be due to a fault on the n+n side FEE Adaptor
PCB rev 290114. Specifically the left hand connector was faulty. The exact
nature of the fault has not yet been determined but will be investigated.

For time being the rev 290114 PCB has been replaced by a rev 180713 PCB
with a 2-way IDC connector from the HV cable (core) to LK1.
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