18/02/15
1300: Error seen when trying to check ASIC settings. See Attachment #1. Power cycle removed error.
nnaida3 still performing much better than other three cards connected to detector (nnaida1,6,8). Why?
Noticed nnaida3 was connected to only adapter PCB which did not feature a metal shielding plate on the front?
Noise in other cards caused by possible short or capacitance between PCB pins and shielding plate?
-> Removed all shielding plates and no difference seen. Pulser peak widths all still approximately the same.
nnaida3+6 PCB grounds connected by thin braid, as well as nnaida1+8. These were all removed. No change.
1830: Still seeing errors when data is sent through them Merger, see attachments #2-6.
Attached heavy duty copper braiding in loop, connecting all nnaida PCBs in use. Improved FWHM of nnaida1 by factor of 2. No change in other nnaida.
Moved kapton and bias from nnaida3 to nnaida11 (same crate, next module along) and saw no appreciable difference in the spectra.
Changed voltages in PSUs for first 16 nnaida.
+5V -> +5.5V, -6V -> -6.5V, +7V -> +8V.
All +5.5V rails at 5.5V, however in PSU#1 (supplying inner FEE modules) -6.5V and +8V rails show variations of +- ~12mV and +- ~4mV respectively, between outlets.
Installed PSUs with updated voltages.
nnaida8 FWHM improved by factor of 2 but no difference in other nnaida.
Current configuration nnaida1,6,8,11. nnaida1+8 connected to p+n side, nnaida6+11 connected to n+n side.
Current FWHM: nnaida1 ~500ch, nnaida6 ~1500ch, nnaida8 ~600ch, nnaida11 ~120ch.
Update response from Patrick:-
Please see posting number 39 for ideas to improve noise and possible reasons why some FEE64 are quieter than others.
I think the SYNC problem is likely due to the version of VHDL perhaps not including the flush of buffers and with the widely different data rates. 224k against 3k.
This should improve with the VHDL update as I think the flush system is more efficient.
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