09.50 CARME IE514 5.1e-11 mbar ( ambient temperature 16 deg C )

10.24 DSSD bias OK - attachment 1

10.40 MACB configuration

      1              2      3      4      5

mode  0x3            0x3    0x3    0x3    0x3

      from VETAR2    from 1 from 1 from 1 from 1
      to 2           aida01 aida05 aida09 aida13
      to 3           :      :      :      :
      to 4           :      :      :      :
      to 5           aida04 aida08 aida12 aida16

WR emulator cables connected to MACB #1 rear panel

DAQ reset and DAQ setup between each test below - the FEE64s were NOT power cycled between tests


      Per https://elog.ph.ed.ac.uk/CARME/478 test WR

      connecting/disconnecting HDMI cable from VETAR2 to MACB level 0 input was tested 20.1.24 per https://elog.ph.ed.ac.uk/CARME/477

      With VETAR2 abd all MACB mode sttings 0x3 observe same WR issues as previously

      Noted clock & sync cables from WR emulator were swapped
      ( pay attention to SMA cables cf. Zybo board *not* NIM module as shown in https://elog.ph.ed.ac.uk/DESPEC/517 )

      Change MACB level 0 mode from 0x3 to 0xd - all other MACBs mode 0x3
      HDMI cabkle from VETAR2 to MACB level 0 input disconnected

      System wide checks - global clocks all fail - see attachments 2-5


11.14 Reduce MAC config to MACB level 0 plus one MACB connected to FEE64s aida01-aida4
      All MACB modes 0x3

      System wide checks aida01-aida04 OK. Same problem observed with WR timestamp for aida01-aida04

      See attachments 6-9

11.22 Reduce MAC config to one MACB connected to FEE64s aida01-aida4
      MACB mode 0x3

      System wide checks aida01-aida04 OK. Same problem observed with WR timestamp for aida01-aida04

      See attachments 10-13

11.26 One MACB config using MACB 2 of 5 in NIM bin connected to FEE64s aida01-aida4
      MACB mode 0x3

      System wide checks aida01-aida04 OK. Same problem observed with WR timestamp for aida01-aida04

      See attachments 14-17

11.36 Connect VETAR2 output directly to aida09

      System wide checks for aida09 OK.Valid WR timestamp appears to be generated.

      See attachments 18-20

      Check NIM bin with MACBs etc
        +/-6V, 12V and 24V lines OK

11.42 Connect VETAR2 to MACB 1 of 5 ( mode 0x3 )
      Connect aida09 to MACB 1 of 5
      Global clock OK. WR decoder status error 0xd reported for aida09. Valid WR timestamp for aida09.

      See attachments 21-24

11.53 Connect VETAR2 to MACB 1 of 5 ( mode 0x3 )
      Connect aida09-aida12 to MACB 1 of 5
      Global clock OK. WR decoder status error 0xd reported for aida09-aida12. WR timestamps for aida09-aida12 very different - aida10 might be correct timestamp?

      See attachments 25-28

11.53 Connect VETAR2 to MACB 2 of 5 ( mode 0x3 )
      Connect aida09-aida12 to MACB 2 of 5
      Global clock OK. WR decoder status error 0xd reported for aida09-aida12. WR timestamps for aida09-aida12 very different - aida10 & 11 approx correct but 11 has 
lower timestamp than 10 so probably not quite right

      See attachments 29-32


15.00 Per https://elog.ph.ed.ac.uk/CARME/478 systematically test 1x MACB configurations to find 'working' MACBs

      Identify 3x MACB modules which produce sensible WR timestamps - all labelled ' firmware version 04/20 '.
      The other 5x MACBs are either unlabelled or labelled unknown.

      MACB configuration now uses 04/20 MACBs for MACBs 1-3 and unlabelled 2xMACBs fpr MACBs 4-5
      aida01-aida08 should produce WR timestamps OK

      Will attempt to update firmwre of 5x MACBs tomorrow pm with NH