Test + and test - daisy chain cabling extended from DSSSD #1 to #2 to DSSSD #1 to DSSSD #4
 terminated by 50 Ohm at end of daisy chain

Grounding cabling extended from DSSSD #1 ( only ) to DSSSD #1 to DSSSD #4
 grounding cables daisy-chained between 4x adaptor PCBs of each DSSSD - no inter-DSSSD grounding cables

DSSSD#1 bias cable SHV-Lemo 00.250 ( to p+n bias adaptor PCB )
DSSSD#2 - DSSSD #4 bias cables SHV - 2x Lemo 00.250 ( to p+n/n+n bias adaptor PCBs )

LK1 fitted for DSSSD #1 & #2 n+n Ohmic side bias adaptor PCBs
LK2 not fitted on any adaptor PCBs? to be checked

CAEN N1419ET internal jumper fitted ( non-floating outputs )? to be checked

16.54 DSSSD bias OK - see attachment 1

      FEE64 temperatures - attachment 2
       aida06 ASIC temp low

      System wide checks and WR - attachments 3-6
       global clock status aid04 0x6, aida06 0x4
       multiple FPGA timestamp and WR decoder errors for MACBs 4 and 5 ( of 5 )

       WR timestamps OK for aida01-aida08 ( w/ MACB firmware version 04/20 )

     ADC data item stats - attachment 7
      all rates consistent with 50Hz pulser *except* 
       aida11 global clock fail
       aida07 no boot
       aida16 no power
       aida06 ? 
       aida15 faulty asic #2

     per FEE64 Rate spectra - attachment 8

     per p+n and n+n FEE64 1.8.L spectra - attachments 9-12
      Pulser peak width p+n side 52 ch FWHM ( aida12 ), n+n side 70 ch FWHM ( aida14 )

     per p+n and n+n 1.8.W spectra - 20us FSR - attachments 13-16