03:09 General check
Rates, temptature, voltages are OK attached 1, 2, 3, 4
****Clock Ckeck******
OK
Clock status test result: Passed 12, Failed 0
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
******ADC check ******
FEE64 module aida06 failed
FEE64 module aida07 failed
FEE64 module aida10 failed
Calibration test result: Passed 9, Failed 3
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module
****** White Rabbit check******
Base Current Difference
aida01 fault 0x7686 : 0x768a : 4
aida02 fault 0x941d : 0x9421 : 4
aida03 fault 0x7cd7 : 0x7cdb : 4
aida04 fault 0xb86d : 0xb871 : 4
aida05 fault 0x1a59 : 0x1a61 : 8
aida06 fault 0x4f45 : 0x4f4d : 8
aida07 fault 0x3bfc : 0x3c2c : 48
aida08 fault 0xc7ce : 0xc7d5 : 7
aida09 fault 0xb33b : 0xb33c : 1
White Rabbit error counter test result: Passed 3, Failed 9
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
*****FPGA check ******
Base Current Difference
aida09 fault 0x1 : 0x2 : 1
aida12 fault 0xa : 0x10 : 6
FPGA Timestamp error counter test result: Passed 10, Failed 2
If any of these counts are reported as in error
The ASIC readout system has detected a timeslip.
That is the timestamp read from the time FIFO is not younger than the last
*****Memory check*****
Returned 0 0 0 0 0 0 0 0 0 0 0 0
Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k
aida01 : 6 12 11 7 2 3 2 4 2 3 6 : 36360
aida02 : 21 15 7 3 2 3 1 4 2 3 6 : 35996
aida03 : 9 10 10 2 4 3 3 3 2 3 6 : 36052
aida04 : 17 17 17 4 0 2 3 4 2 3 6 : 36444
aida05 : 25 7 3 1 1 1 2 3 2 4 6 : 37292
aida06 : 29 15 7 2 3 4 1 3 3 3 6 : 36700
aida07 : 17 17 6 5 2 3 2 3 3 3 6 : 36812
aida08 : 22 6 10 5 3 1 3 4 2 3 6 : 36360
aida09 : 18 28 14 4 2 3 3 3 2 3 6 : 36232
aida10 : 26 16 4 3 3 1 3 4 2 3 6 : 36296
aida11 : 16 10 4 0 3 3 1 4 2 3 6 : 35856
aida12 : 19 14 4 2 4 4 1 3 3 3 6 : 36668
04:15 General Check
Rates, Tempratures, Voltages are ok, attached 5,6,7,8
******Clock Check*******
OK
Clock status test result: Passed 12, Failed 0
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
******ADC******
Clock status test result: Passed 12, Failed 0
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
******White Rabbit check******
Base Current Difference
aida01 fault 0x7686 : 0x768a : 4
aida02 fault 0x941d : 0x9421 : 4
aida03 fault 0x7cd7 : 0x7cdb : 4
aida04 fault 0xb86d : 0xb871 : 4
aida05 fault 0x1a59 : 0x1a61 : 8
aida06 fault 0x4f45 : 0x4f4d : 8
aida07 fault 0x3bfc : 0x3c39 : 61
aida08 fault 0xc7ce : 0xc7d5 : 7
aida09 fault 0xb33b : 0xb33c : 1
White Rabbit error counter test result: Passed 3, Failed 9
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
******FPGA Check******
Base Current Difference
aida09 fault 0x1 : 0x2 : 1
aida12 fault 0xa : 0x11 : 7
FPGA Timestamp error counter test result: Passed 10, Failed 2
If any of these counts are reported as in error
The ASIC readout system has detected a timeslip.
That is the timestamp read from the time FIFO is not younger than the last
****** Memorey check******
Returned 0 0 0 0 0 0 0 0 0 0 0 0
Mem(KB) : 4 8 16 32 64 128 256 512 1k 2k 4k
aida01 : 27 21 10 7 1 3 2 4 2 3 6 : 36436
aida02 : 28 21 3 3 1 3 1 4 2 3 6 : 35944
aida03 : 15 8 11 3 3 3 3 3 2 3 6 : 36044
aida04 : 25 19 14 4 1 3 4 3 2 3 6 : 36380
aida05 : 12 6 5 1 0 2 2 3 2 4 6 : 37328
aida06 : 29 21 4 2 3 4 1 3 3 3 6 : 36700
aida07 : 19 14 7 6 2 3 2 2 3 3 6 : 36332
aida08 : 11 8 8 6 3 1 3 4 2 3 6 : 36332
aida09 : 16 25 11 3 1 2 2 4 2 3 6 : 36184
aida10 : 14 13 4 2 3 2 2 4 2 3 6 : 36064
aida11 : 4 9 4 0 3 3 1 4 2 3 6 : 35800
aida12 : 38 17 4 2 4 4 1 3 3 3 6 : 36768
|