11.45 DSSSD bias & leakage current OK - attachments 9-10

      FEE64 temps OK - attachment 8
      *except* aida02 ASIC temp which is known to be u/s

      All system wide checks OK *except* aida02 and aida04 WR decoder/FPGA status errors - attachments 6-7
       HDMI cabling disturbed during platform move?

      WR timestamps OK - attachment 5

      ADC data item stats - attachment 4
        10/16 < 20k, max 115k

      per FEE64 Rate spectra - attachments 3

      per 1.8.W spectra - 20us FSR - attachments 1-2

11.58 BB7 preamps unplugged. Noise conditions OK. Did not change considerably.
      11/16 < 20k (aida09 has 1 hot channel), max 114k Attachments 11-12.

12:34 Detector powered down to bring to safe state to check HDMI cables of aida02 and aida03.

15:06 Reseated aida02 and aida03. No more FPGA timestamp error. See attachment 13-14.

      Rates and histograms look good for pulser walk through. Test + and test - connected. Currently, Attachment 16-17.
      Temp OK Attachment 15. Bias OK Attachment 18.

      Data links aida02 and aida08 missing (?)

16:30 All slow comparator thresholds set to 0x64 for alpha background run during platform freeze.

      Initial rates and histograms attachment 19 - 20. aida04 noisy in ASIC 1.

      Temps OK. Attachment 21.
      MBS disc and tape setup in atttachment 22-23.