AIDA GELINA BRIKEN nToF CRIB ISOLDE CIRCE nTOFCapture DESPEC DTAS EDI_PSA 179Ta CARME StellarModelling DCF K40
  DESPEC, Page 2 of 35  ELOG logo
Entry  Wed Jul 23 15:56:00 2025, CC, MP, NK, Test of AIDA05 with new bias module Screenshot_from_2025-07-23_17-08-56.png

Attachment1: AIDA05.1.8L when AIDA05 connected, biased at 101 V with shielded cables. BB7 is still connected but not biased (same configuration as the previous elog). The channel of the CAEN power supply #0 is connected to ASIC08 and biased at 100V. The channel of the CAEN power supply #1 is disconnected but still biased at 100V. AIDA04 (chained to AIDA05) is biased via a shielded cable to an iseg NHQ 246L power supplied, biased at 101 V with 16 uA.

All the outside drain wires of bplast are now taped to the snout.

The red markers of the cursors of the previous test have been left for ease of comparison.

FWHM: 21699-21644 = 55 channels (to be compared with the previous elogs between 73 channels and 79 channels)

Conclusion: a significant improvement can be observed with a cleaner power supply.

Entry  Wed Jul 23 15:04:26 2025, CC, MP, NK, Test of AIDA05 with BB7 connected to Mesytec but not biased Screenshot_from_2025-07-23_16-16-57.png

Attachment1: AIDA05.1.8L when AIDA05 connected, biased at 100 V with not-shielded cables, after the DEGAS platform has been closed, the 2 tiles of BB7 have been connected to the mesytec preamps. BB7 is not biased. The mesytec preamps have been fully connected and supplied but 6/8 black cables are not connected on the other side. 4X and 4Y are connected to the 2 FEBEX cards.

The 2 drain wires of bplast that were hanging on the bottom are now taped to the snout, not making any antena effect anymore.

FWHM: 79 channels (to be compared with the previous elogs between 73 channels and 76 channels)

Conclusion: no significant differences can be observed when BB7 is connected. The tail on the left side of the spectrum in twice as small, most likely because on the now-taped drain wires of bplast

Entry  Wed Jul 23 13:59:37 2025, CC, NK, Shielding of the snout Screenshot_from_2025-07-23_15-07-42.png

Attachment1: AIDA05.1.8L when AIDA05 connected, biased at 100 V with not-shielded cables, CAEN HT,  after the base of the snout (screws) has been connected to the ground via cupper sheets

FWHM: 76 channels (to be compared with the 2 previous elogs 73 channels and 75 channels)

Conclusion: no differences can be observed.

Entry  Wed Jul 23 13:08:30 2025, CC, NK, Comparison of channels in the same FEE64 and ASIC 05.1 Screenshot_from_2025-07-23_14-11-36.pngScreenshot_from_2025-07-23_14-13-46.pngScreenshot_from_2025-07-23_14-16-03.pngScreenshot_from_2025-07-23_14-18-27.pngScreenshot_from_2025-07-23_14-20-42.png

Biased at 100, AIDA05 connected, HT cables not shielded CAEN HT

Attachment 1: AIDA05.1.8L --> FWHM 75 channels

Attachment 2: AIDA05.1.1L --> FWHM 70 channels; peak of the pulser shifted to the right (red lines on the left: cursor for the 1.8L)

Attachment 3: AIDA05.1.4L --> FWHM 85 channels; peak of the pulser completely shifted to the left (10 000 on the left)

Attachment 4: AIDA05.1.12L --> FWHM 78 channels

Attachment 5: AIDA05.1.15L --> FWHM 79 channels, peak the most shifted to the right of the 5 curves tested

Entry  Wed Jul 23 09:37:34 2025, CC, NK, Comparison pulser FWHM with/without HT and detector cables 9x

This elog is the first reliable. Before, the histograms have not been zero'd

Each test are done and compared for AIDA05.1.8L, compared with the pulser (caracteristics, see attachment1)

Test 1: with HT cables shielded

Attachment 2: HT = 100V; cable AIDA05 connected --> FWHM = 77 channels (= 51.3 keV) with a top of the curve at 100 cts (AIDA9.1.8L has also been checked and was at 89 channels)

Attachment 3: HT = 0V; cable AIDA05 connected --> FWHM = 1757 channels with a top of the curve at 15 cts after almost 40 min because the noise had a baseline of 6500 channels

Attachment 4: HT = 0V; cable AIDA05 disconnected --> FWHM = 16 channels with a top of the curve at 110 cts

Attachment 5: HT = 100V; cable AIDA05 disconnected --> FWHM = 17 channels with a top of the curve at 110 cts

Test 2: with HT cables not shielded

Attachment 6: HT = 0V; cable AIDA05 connected --> FWHM = 1452 channels (968 keV) with a top of the curve at 23 cts after 1:15 hours because the noise had a baseline of 7000 channels

Attachment 7: HT = 100V; cable AIDA05 connected --> FWHM = 73 channels with a top of the curve at 100 cts

Attachment 8: HT = 0V; cable AIDA05 disconnected --> FWHM = 15 channels with a top of the curve at 120 cts

Attachment 9: HT = 100V; cable AIDA05 disconnected --> FWHM = 16 channels with a top of the curve at 125 cts

Conclusion: with shielded or unshielded cables, the noise situation seems to be the same, proving that mot of the noise don't come from the cables

Other thing that have been noticed is that the peak of the pulser is shifted when the cables are connected compared to when they are not connected: connected: peak at around channel 21675; disconnected: peak at around channel 21925

Entry  Tue Jul 22 18:00:45 2025, CC, NK, MP, FWHM aida FEE Screenshot_from_2025-07-22_18-59-26.pngScreenshot_from_2025-07-22_18-59-45.png

AIDA05 completely disconnected, all the others FEEs64 are fully connected

Attachment 1: aida05, FWHM= 95 ch, 63 keV

Attachment 2: aida15, FWHM= 108 ch, 74 keV

Entry  Tue Jul 22 17:00:26 2025, MP, CC, Status Screenshot_from_2025-07-22_17-51-52.pngScreenshot_from_2025-07-22_17-59-20.png

Test with shielded HV cables for both detectors.

The FWHM for ch1 is now 184 ch.

Yesterday cables for cards 5, 6, 10, 11, 12, 14, 16 were partially connected (only 1 out of 2 flat cables was in), now both are connected.

Entry  Mon Jul 21 13:01:19 2025, MP, Status Screenshot_from_2025-07-21_14-00-23.pngScreenshot_from_2025-07-21_14-00-39.png

Status before grounding checks

Entry  Sun Jun 15 10:53:08 2025, TD, Sunday 15 June 2025 41x
11.45 DSSSD bias & leakage current - attachment 1
      FEE64 temps OK - attachment 2
      All system wide checks OK *except* WR decoder status aida02 - attachment 3
      WR timestamps OK - attachment 4
      ADC data item stats - attachment 5

      per FEE64 Rate spectra - attachments 6-7
       note ASICs with per channel rates of 22Hz (pulser)
       note *all* FEE64 slow comparator 0x64
       note ignore aida10 - connected to MSL type BB7 - not biased yet

      per p+n FEE64 1.8.L spectra - attachment 8-9
       pulser peak widths
        aida05, aida14, aida16 c. 15-20 ch FWHM ( c. 10-15keV FWHM ) - cable from DSSSD not connected to adaptor PCB
        aida15 c. 137 ch FWHM - electronic noise c. 2x worse than configuration used for 2023/4 tests

      per p+n FEE64 1.8.W spectra - 20us FSR - attachments 10
      per p+n FEE64 1.8.W spectra - 20us FSR - expanded y-scale = 2000 x 122uV/LSB = 0.244V FSR - attachment 11

      per n+n FEE64 1.8.W spectra - 20us FSR - attachments 12


15.20 Data suggests 2x (of 6x) Si wafers are not biased - aida11 & aida05-aida12 - J2 cable disconnected

      Switch from negative to positive bias polarity

      CAEN N1419ET channels 1 and 2 switched from negative to positive polarity
      Note internal LK fitted - HV outputs *not* floating

      Channel 1 -> DSSSD#0 from aida12 to aida04 (HV daisy chain aida12-aida03-aida15 *not* removed)
      Channel 2 -> DSSSD#1 from aida16 to aida08 (HV daisy chain aida16-aida07-aida11 *not* removed)

      LK1 removed from adaptor PCBs for aida02. aida04, aida06, aaida08

      LK1 fitted aida05, aida13, aida10, aida09, aida15, aida11

      LK3 *no* change

      DSSSD bias & leakage current - attachment 13
       note increase in leakage current for DSSSD#0 but not DSSSD#1
       - indicating DSSSD#0 has all Si wafers biased
       - all wafers of DSSSD#1 not biased => damaged adaptor PCB and/or cabling, misaligned ribbon cable/Kapton PCB connection within snout
      FEE64 temps OK - attachment 14
      ADC data item stats - attachment 15

      per FEE64 Rate spectra - attachments 16-17
       note ASICs with per channel rates of 22Hz (pulser)
       note *all* FEE64 slow comparator 0x64
       note ignore aida10 - connected to MSL type BB7 - not biased yet

      per p+n FEE64 1.8.L spectra - attachment 18-19
       pulser peak widths
        aida05, aida14, aida16 c. 15-20 ch FWHM ( c. 10-15keV FWHM ) - cable from DSSSD not connected to adaptor PCB
        aida15 c. 108 ch FWHM - electronic noise c. 2x worse than configuration used for 2023/4 tests

      per p+n FEE64 1.8.W spectra - 20us FSR - attachments 20
      per p+n FEE64 1.8.W spectra - 20us FSR - expanded y-scale = 2000 x 122uV/LSB = 0.244V FSR - attachment 21

      per n+n FEE64 1.8.W spectra - 20us FSR - attachments 22


16.40 Add LK1 to aida03, aida07

      DSSSD bias & leakage current - attachment 23
       no change

      ADC data item stats - attachment 24

      per p+n FEE64 1.8.L spectra - attachment 25-26
       pulser peak widths
        aida05, aida14, aida16 c. 15-20 ch FWHM ( c. 10-15keV FWHM ) - cable from DSSSD not connected to adaptor PCB
        aida15 c. 117 ch FWHM - electronic noise c. 2x worse than configuration used for 2023/4 tests

      per p+n FEE64 1.8.W spectra - 20us FSR - attachments 27
       no change

16.50 Increase DSSSD#0 bias from +100V to +120V

      DSSSD bias & leakage current - attachment 28

      per p+n FEE64 1.8.L spectra - attachment 29-30
       pulser peak widths
        aida05, aida14, aida16 c. 15-20 ch FWHM ( c. 10-15keV FWHM ) - cable from DSSSD not connected to adaptor PCB
        aida15 c. 70 ch FWHM - electronic noise c. 1.2-2x worse than configuration used for 2023/4 tests

      per FEE64 Rate spectra - attachments 31-32

      per FEE64 1.8.W spectra - 20us FSR - attachments 33-36
       aida02 & aida04 stabilised but still very noisy

      Switch BNC PB-5 Pulser polarity + to - and connect test- test daisy chain

      ADC data item stats - attachment 37

      per FEE64 Rate spectra - attachments 38-39
       aida02 & aida04 rates significantly lower but not 25Hz expected

      per n+n FEE64 1.8.L spectra - attachment 40
       pulser peak width aida02 c. 700 ch FWHM - very noisy!

      per n+n FEE64 1.8.W spectra 20us FSR - attachment 41 

*** Summary

    DSSSD#0
    3x Si wafers biased OK
    p+n junction side electronic noise c. 1.2-2x 2023/4 configuration
    n+n Ohmic side very noisy - increased detector HV to stabilise => increased capacitative load cf. 2023/4 configuration?

    DSSSD#1
    2x Si wafers biased OK, 1x probably not biased
    p+n junction side electronic noise > 4x 2023/4 configuration
    n+n Ohmic side very noisy/unstable - increased detector HV not attempted due to issues with biasing all 3x Si wafers

    MSL type BB7 
    not biased yet

    To Do
    Complete connection and grounding of Bplas detectors
Entry  Sat Jun 14 11:20:45 2025, TD, Saturday 14 June 2025 30x
12.21 BNC PB-5 settings
      Amplitude 1.0V
      Attenuator x1
      Frequency 22Hz
      Polarity +
      Tau_d 1ms
      Tail pulse
      Clamp ON
      Pulser output connected to p+n test daisy chain - n+n test daisy chain not connected 

      per DSSSD green/yellow ground daisy chain was removed yesterday

      FEE64 adaptor PCB grounds connected by heavy duty braid wrapped in copper foil to AIDA support assembly frame
      Snout connected to AIDA support assembly frame by heavy duty braid bolted to frame and connected to snout by adhesive copper foil.

      DSSSD - FEE64 adaptor PCB cabling (cannot connect some ribbon cables because cable flipped and connector key now incorrectly oriented)

                    aida10 aida14 aida13
                      ox     xo     oo
                    aida09 aida01 aida05
                      oo     oo     xo
      aida06 aida02                      aida04 aida08    *Beam into screen*
        ox     oo                          oo     oo
                    aida15 aida03 aida12
                      oo     oo     ox
                    aida11 aida07 aida16 
                      ox     oo     xo

      o = connected
      x = not connected
      e.g. J1 J2 connected = oo, J1 only connected = ox

      Adaptor PCB top/component side
      E     J1
      R
      N
      I     J2

      Adaptor PCB 
       LK1 fitted aida02, aida04, aida06, aida08
       LK3 fitted aida03, aida07

      DSSSD bias & leakage current - attachment 1
      FEE64 temps OK - attachment 2
      All system wide checks OK *except* WR decoder status aida02 - attachment 3
      WR timestamps OK - attachment 4
      ADC data item stats - attachment 5

      per FEE64 Rate spectra - attachments 6-7
       note ASICs with per channel rates of 22Hz (pulser)
       note *all* FEE64 slow comparator 0x64 ( *note* subsequently found ASIC #2-4 of a number of FEE64s were set to 0x0 )

      per p+n FEE64 1.8.W spectra - 20us, 200us, 2ms and 20ms FSR - attachments 8-11
      per p+n FEE64 1.8.W spectra - 20ms FSR - expanded y-scale = 2000 x 122uV/LSB = 0.244V FSR - attachment 12

      per n+n FEE64 1.8.W spectra - 20ms, 2ms, 200us and 20us FSR - attachments 13-16

      per p+n FEE64 1.8.L spectra - attachment 17
       pulser peak widths
        aida05, aida14, aida16 c. 15-20 ch FWHM ( c. 10-15keV FWHM ) - cable from DSSSD not connected to adaptor PCB
        aida09 c. 120 ch FWHM - electronic noise c. 2x worse than configuration used for 2023/4 tests
        all other FEE64s *very* noisy/unstable


14.45 Found some FEE64s with slow comparator 0x64 for ASIC#1 and 0x0 for ASICs #2-4
      Slow comparator 0x64 now set for all ASICs of all FEE64s

      ASIC settings saved to 2025Jun14-15.00.09

      ADC data item stats - attachment 18

      per FEE64 Rate spectra - attachments 19-20
       note ASICs with per channel rates of 22Hz (pulser)
       note *all* FEE64 slow comparator 0x64
       note aida10 to be connected to MSL type BB7 - ignore for time being

      per FEE64 1.8.W spectra - 20us FSR - attachments 21-22

      per p+n FEE64 1.8.L spectra - attachments 23-24
       pulser peak widths
        aida05, aida14, aida16 c. 20 ch FWHM - cable from DSSSD not connected to adaptor PCB
        aida09 c. 120 ch FWHM - electronic noise c. 2x worse than configuration used for 2023/4 tests
Entry  Fri Jun 13 12:42:39 2025, CC, TD, Friday 13 June 2025 10x
13.42 ASIC settings 2025Jun12-13.53.04
      *all* FEE64s slow comparator 0x64
                   all fast disc outputs disabled
      p+n FEE64s waveform threshold 7000, n+n FEE64s 9000

      CC grounding ribbon cable heavy duty braid to adaptor PCB and AIDA support assembly ground
       'top' p+n FEE64s and snout to be completed
      
16.00 DSSSD bias & leakage current - attachment 1
      FEE64 temps OK - attachment 2
      All system wide checks OK *except* WR decoder status aida02 and aida06 - attachment 3
      WR timestamps OK - attachment 4
      ADC data item stats - attachment 5
      per FEE64 Rate spectra - attachment 6
      per p+n FEE64 1.8.L spectra - attachment 7
       aida09 pulser peak width 117 ch FWHM - no change since yesterday
      per FEE64 1.8.W spectra - 20us FSR - attachments 8-10
  
Entry  Thu Jun 12 13:15:25 2025, GB, CC, NK, MP, TD, Thursday 12 June 2025 Screenshot_from_2025-06-12_14-39-35.pngScreenshot_from_2025-06-12_14-33-26.png
EMC tests with NK (Orsay)

Stack configuration (upstream->downstream)

bPlas 
AIDA DSSSD #0
AIDA DSSSD #1
bPlas
3x MSL type BB7(DS)-1000 (1x aida10, 2x Mesytec preamplifiers)

AIDA DSSSD #0 bias -100V leakage current -13.23uA
AIDA DSSSD #1 bias -100V leakage current -9.68uA

BNC PB-5 settings
Amplitude 1.0V
Attenuator x1
Frequency 25Hz
Polarity +
tau_d 1ms
Tail pulse

14.39 per p+n FEE64 1.8.W spectra - 20us FSR - attachment 1

      per p+n FEE64 1.8.L spectra - attachment 2

      Pulser peak widths ch FWHM

      DSSSD #0 (DSSSD - FEE64 cables with heavy duty braid - electrically connected to ground of adaptor PCB and internally connected to ground within snout)

9  1   5
120 201  21
15  3  12
114 180  broad

      DSSSD #1 (DSSSD - FEE64 cables with mesh - currently not connected i.e. floating to adaptor PCB and internally connected to ground within snout)
10 14  13
-   22   374
11  7  16
broad 417 20

       Pulser peak widths c. 20 ch FWHM probably indicate cable from DSSSD *not* connected to FEE64 adaptor PCB

        
Entry  Tue Apr 8 08:52:39 2025, TD, AIDA grounding powerstax-ms1u_instructionmanua.pdf20250408_095624.jpg
AIDA DSSSDs and FEE64-DSSSD cabling are electrically isolated (by design) from snout, mounting rods and support assembly.
 FEE64-DSSSD ribbon cables screened by 3M 1245 Cu foil, drain wire to FEE64 adaptor PCB

AIDA FEE64s are electrically isolated (by design) from the AIDA support frame and each other.

BNC PB-5 test signal 
 daisy chained to FEE64 adaptor PCBs via screened RG174 cable/Lemo 00-250 

CAEN N1419ET DSSSD bias
 daisy chained to 1x p+n junction FEE64 adaptor PCB/Si wafer via screened RG174 cable/Lemo 00-250
 CAEN N1419ET outputs floating, locally grounded by 1x n+n Ohmic FEE64 adaptor PCB link/DSSSD

AIDA FEE64s are connected to the DESPEC 19" rack
 power (AIDA FEE64 PSUs),
 timestamp (AIDA NIM MACB modules),
 system console (via serial-USB cables to USB hubs),
 RJ45 network cables (24 port Gbit network switch)

AIDA PSU PowerStax MS1U-6C-222233-01 - see attachments 1-2
 PSU outputs V+/V- and common 
 no direct ground connection

AIDA MACB
 HDMI cabling MACB-FEE64 is screened and shield is grounded

system console
 ?

RJ45 network cables are coupled by ferrite beads to FEE64 PCB and network switch
 no direct ground connection
Entry  Tue Mar 11 11:53:18 2025, TD, Monday 10 March 11x
18.30 AIDA powered up for brief test

      DSSSD bias & leakage current OK - attachment 1

      FEE64 temperatures OK - attachment 2

      ADC data item stats - attachment 3
       ASIC settings at power up - slow comparator 0x64

      per p+n FEE64 1.8.L spectra - attachment 4
       pulser peak width aida9 55 ch FWHM (39keV FWHm), aida15 53 ch FWHM (37keV FWHM)

      p+n FEE64 aida15 1.8.W spectra - 20us FSR - attachments 5-6

      saved *.L, *.H, *.W spectra for aida15 - attachments 7-11
       *.W spectra - 20us, 200us, 2ms & 20ms FSR 


19.27 DAQ STOP
      DSSSD bias OFF
      FEE64 power OFF
Entry  Sat Feb 22 12:35:38 2025, TD, Offline analysis data files R9_85-R9_199 (84Mo setting) 22x
Start 00:43 22.2.25 https://elog.gsi.de/despec/G-24-00302/57
AIDA data file R9_85

Converting hexadecimal timestamp to decimal: 1740181266259754800
Assuming that this timestamp is in nanoseconds (1 billionth of a second):
GMT: Friday, February 21, 2025 11:41:06.259 PM
Your time zone: Friday, February 21, 2025 11:41:06.259 PM GMT+00:00


End 12:56 22.2.25 https://elog.gsi.de/despec/G-24-00302/85 (start of next degrader setting)
AIDA data file R9_199

Converting hexadecimal timestamp to decimal: 1740224934731157800
Assuming that this timestamp is in nanoseconds (1 billionth of a second):
GMT: Saturday, February 22, 2025 11:48:54.731 AM
Your time zone: Saturday, February 22, 2025 11:48:54.731 AM GMT+00:00

Analysis data files FEB25/R9_85 and FEB25/R9_199
 - no timewarps
 - deadtime aida05 c. 37% and 39% due to high SC41 scaler input to MACB - issue subsequently fixed 
 - deadtime aida04 c. 4%, all other FEE64s <<1%




FEE64 configuration

FEE64   a b c 
      g       h
        d e f

         a  b  c  d  e  f  g  h
DSSSD#1 15  3 12  9  1  5  2  4

n+n Ohmic FEE64s 2, 4

Data analysis assumes

- all LEC ADC data channels with valid ADC offset included (507 of 512 channels)
      LEC calibration ADC offset only

- no clustering

- no multiplex timestamp correction

- no p+n junction side - n+n Ohmic side correlation time gates

- FEE64 *not* DSSSD strip ordering

- hardware - slow comparator setting p+n junction FEE64s 100keV, n+n Ohmic FEE64s 150keV

- LEC energy difference +/- 168keV

- HEC energy difference +/- 1.68GeV

- valid LEC events

   p+n junction side multiplicity = 1 and n+n Ohmic side multiplicity = 1
   151keV < LEC energy < 1000keV
    to select candidate beta events
    standalone analysis of AIDA data, no downstream veto detector

- valid HEC events
   p+n junction side multiplicity > 0 and n+n Ohmic side multiplicity > 0
   (x,y) strips corresponding to maximum energy
   p+n junction and n+n Ohmic side HEC 

- HEC veto 
   not available - only 1x AIDA DSSSD installed

- per pixel implant-decay correlations

- end of event 
   difference in WR timestamp between successive ADC data items > 2500 and overall event length < 33us





per FEE64 LEC ADC data items 268ms/channel - attachments 3-5
- all
- 150keV < energy < 1500keV
- energy > 1500keV

absence of high instantaneous rates on spill cf. S181, S100, S505 etc
spill structure visible for energies > 1500keV - probably to be expected as majority of such events should be light ions

per FEE64 HEC ADC data items 268ms/channel - attachments 6-8

- all
- 100MeV < energy < 1000MeV
- energy > 1000MeV

Implant & decay event rates 262us/channel - attachment 9

LEC m_p versus m_n - attachment 10

LEC e_p versus e_n - 20keV/channel - attachment 11

HEC x strip versus y strip - attachment 12

- HEC-LEC implant decay time difference <1s
- HEC-LEC implant decay time difference <100s

shows x-y window used to select 82Nb events

HEC m_p versus m_n - attachment 13

HEC e_p versus e_n - 20MeV/channel - attachment 14


HEC-LEC implant-decay time difference (4ms/channel) versus - attachment 15
- HEC energy 
- LEC energy
- x & y strip 

x strips 130 & 136 disabled

HEC & LEC p strip - n strip time difference (2us/channel, offset=2000 channels) - attachment 16

HEC E (20MeV/channel) versus implant-decay time difference (4.194ms/channel) - attachment 17

LEC E (20keV/channel) versus implant-decay time difference (4.194ms/channel) - attachment 18

LEC e_p - e_n (5.6keV/channel) versus implant-decay time difference (4.194ms/channel) - attachment 19

HEC x & y strip versus implant-decay time difference (4.194ms/channel) - attachment 20

HEC-LEC implant-decay time difference (8.389ms/channel) for candidate 82Nb events - attachment 21
- blue - forward
- cyan - backward

Note
- no FRS PID
- no HEC dE
- no HEC veto
- no HEC energy gates - assume all events within x-y window *stop* in AIDA DSSSD - 82Nb events known to overlap in x-y with (longer-lived, more numerous) 83Nb events
- no front-back time difference
- no clustering
- *all* LEC channels with valid ADC offsets (507 of 512) included *except* 2x strips 130 & 136

HEC-LEC implant-decay time difference (8.389ms/channel) for candidate 82Nb events - attachment 22

Weighted least squares fit channels 1-12 half life 55(9)ms cf. NNDC 50.0(3)ms.
Entry  Thu Feb 20 17:06:42 2025, JB, CC, TD,MP, WR error for aida 13,14,15,16 

WR timestamp errors resolved after reseating the HDMI cables to the MACB

Entry  Wed Feb 12 10:46:01 2025, TD, Offline analysis data files S181 R4_351-396  25x
Analysis data files R4_351-396


Data file R4_351 first WR ts 0x17D7B4C72B0BA9C8
Converting hexadecimal timestamp to decimal: 1718040550378809900
Assuming that this timestamp is in nanoseconds (1 billionth of a second):
GMT: Monday, June 10, 2024 5:29:10.378 PM
Your time zone: Monday, June 10, 2024 6:29:10.378 PM GMT+01:00 DST
Relative: 8 months ago

Data file R4_396 first WR ts 0x17D7BE86408888E8
Converting hexadecimal timestamp to decimal: 1718051266682718500
Assuming that this timestamp is in nanoseconds (1 billionth of a second):
GMT: Monday, June 10, 2024 8:27:46.682 PM
Your time zone: Monday, June 10, 2024 9:27:46.682 PM GMT+01:00 DST
Relative: 8 months ago

Attachments 1-2 - analysis data files R4_351 and R4_396
 max. *time averaged* deadtime FEE64 #7 (aida08) 1.7% and 1.7% respectively
 all other FEE64 deadtimes < 1%





FEE64 configuration

FEE64   a b c 
      g       h
        d e f

         a  b  c  d  e  f  g  h
DSSSD#1 15  3 12  9  1  5  2  4
DSSSD#2 11  7 16 10 14 13  6  8

n+n Ohmic FEE64s 2, 4, 6, 8

Data analysis assumes

- all LEC ADC data channels with valid ADC offset included (1012 of 1024 channels)
      LEC calibration ADC offset only

- no clustering

- no multiplex timestamp correction

- no p+n junction side - n+n Ohmic side correlation time gates

- FEE64 *not* DSSSD strip ordering

- hardware - slow comparator setting p+n junction FEE64s 100keV, n+n Ohmic FEE64s 150keV

- LEC energy difference +/- 11200keV (wide open for first pass analysis)

- HEC energy difference +/- 1.68GeV

- valid LEC events

   p+n junction side multiplicity = 1 and n+n Ohmic side multiplicity = 1

   LEC energy > 151keV
    to select candidate beta  and alpha events - will include light ions
    standalone analysis of AIDA data, no downstream veto detector

- valid HEC events
   p+n junction side multiplicity > 0 and n+n Ohmic side multiplicity > 0

  (x,y) strips corresponding to maximum energy
  p+n junction and n+n Ohmic side HEC 

- HEC veto 
   p+n junction side multiplicity > 0 or n+n Ohmic side multiplicity > 0

- per pixel implant-decay correlations

- end of event 
   difference in WR timestamp between successive ADC data items > 2500 and overall event length < 33us




Number of events observed

 *** scaler # 1 count:  35941696 DSSSD#1 decay events       LEC m_p = 1 and LEC m_n = 1, ADC data > 151.2keV *and* HEC m_p = HEC m_n = 0, ADC data > 151.2MeV
 *** scaler # 2 count:  31960753 DSSSD#2 decay events       LEC m_p = 1 and LEC m_n = 1, ADC data > 151.2keV *and* HEC m_p = HEC m_n = 0, ADC data > 151.2MeV
 *** scaler # 3 count:   1499844 DSSSD#1 implant events     HEC m_p > 0 and HEC m_n > 0, ADC data > 151.2MeV
 *** scaler # 4 count:   1297356 DSSSD#2 implant events     HEC m_p > 0 and HEC m_n > 0, ADC data > 151.2MeV
 *** scaler # 5 count:   5446969 DSSSD#1 other events       HEC m_p > 0 or HEC m_n > 0 *and* LEC m_p > 8 or LEC m_n > 8
 *** scaler # 6 count:  75030747 DSSSD#2 other events       HEC m_p > 0 or HEC m_n > 0 *and* LEC m_p > 8 or LEC m_n > 8

DSSSD#1 implant events
x=m_p=0 ?
y=m_n=0 ?

DSSSD#2 implant events
x=m_p=0 ?
y=m_n=0 ?


Attachments 3-6 - per FEE64 LEC data item rates 268ms/channel - common x and y scales
 - no conditions
 - 150keV < energy < 1500keV
 - energy > 1500keV

Some deadtime observed on spill, none observed off spill. No significant variation in per FEE64 LEC data rates.

Attachments 7-8 - per FEE64 LEC hit patterns
 - 150keV < energy < 1500keV
 - energy > 1500keV

Aside from usual hot channels at cable/DSSSD boundaries good hit pattern observed. For > 1500keV events observe flat field in x-plane, focussed in y-plane.

Attachments 9-11 - per FEE64 HEC data item rates 268ms/channel - common x and y scales
 - no conditions
 - 100MeV < energy < 1000MeV
 - energy > 1000MeV

Note hot HEC channel in aida08 - should be disabled.

Attachment 12 - per DSSSD decay and implant rates 262us/channel - common x and y scales

Attachment 13 - per DSSSD LEC m_p versus m_n 
 - no conditions

Attachment 14 - per DSSSD LEC p strip versus n strip
 - no conditions

Attachments 15-16 - per DSSSD LEC E_p versus E_n - x and y-axes 20keV/channel
 - LEC energy difference +/- 2000 channels (+/- 11200keV)

Attachments 17-18 - per DSSSD p strip versus n strip
 - HEC-LEC time difference <1s
 - HEC-LEC time difference <100s

Attachment 19 -  per DSSSD HEC m_p versus m_n

Attachment 20 - per DSSSD HEC p strip versus n strip
 - no conditions
 - z_hec=1 => implant stops in DSSSD#1
 - z_hec=3 => implant hits DSSSD#1 and DSSSD#2 but does not necessarily stop in DSSSD#2

Attachment 21 - per DSSSD HEC E_p versus E_n - x and y axes 20MeV/channel

Attachment 22 - DSSSD#1 HEC E_p versus DSSSD#2 HEC E_p - x and y axes 20MeV/channel
 - few events stop in DSSSD#2
 - most events lower Z and A - fission fragments?

Attachment 23 - per DSSSD per pixel HEC-LEC time difference 4.096us/channel
 - events observed to <<100us

Attachment 24 - per DSSSD per pixel HEC-LEC time difference (1s/channel) versus LEC energy (20keV/channel)
 - alpha events long lived 
 - some evidence of effect of on spill deadtime in implant-decay correlations (cf. S100 and S505)

Attachment 25 - per DSSSD implant and decay event p strip - n strip time difference (2us/channel)
 - wider distribution for implant events as expected due to number of ASIC active channels in implant events
 - most decay events +/-2us - lower ASIC occupancy for decay events so most events will be from same (or adjacent) clock cycle
Entry  Fri Jan 31 17:26:47 2025, CC, TD, MP, Friday 31 January contd. 16x
18.18 bPlas and BB7 installs complete 
      Restart AIDA DAQ, Merger, Tape Server and re-test

      per p+n FEE64 1.8.L spectra - attachment 1
       aida09 pulser peak width 69 ch FWHM = 42keV FWHM

      per FEE64 Rate Spectra - attachment 2
       BB18 p+n FEE64s very good/good, n+n FEE64s OK - could be improved
       BB7 aida10 p+n asics good, n+n asics 1x good, 1x OK

      per FEE64 1.8.W spectra - 20us FSR - attachments 3-5

      ADC data item stats - attachment 6
       aida01  aida03 30k, all other BB18 p+n FEE64s < 20k, n+n FEE64s 100/270k
       BB7 aida10 19k

      WR timestamps OK - attachment 7

      Merger, TapeSever etc - attachments 8-9
       disk directpry /TapeData/FEB25
       working OK
     
      DSSSD bias & leakage current OK - attachment 10

      System wide checks OK - attachment 11-15
       note global clock status 6 errors reported earlier today have now gone

      FEE64 temperatures OK - attachment 16

18.38 Transition to safe state

      DAQ STOP
      disable data transfer 1
      detector bias OFF
      FEE64 power OFF


      Can restart as follows

1) FEE64 power ON
2) DAQ RESET
3) DAQ SETUP
4) Enable histogramming
5) Enable waveforms
6) Detector bias ON
7) Restore ASIC settings
8) ASIC Control
9) FEE64 temperatures
10) System wide checks
     sync ASIC clocks
11) FADC control - calibrate ADCS for *all* FEE64s
12) System wide checks contd.
13) DAQ GO
14) Check ADC data item stats
15) Check WR timestamps

If all OK can re-connect to Merger/TapeServer as follows

1) DAQ STOP
2) enable data transfer 1
3) DAQ GO


Can disconnect from Merger/TapeServer as follows

1) DAQ STOP
2) disable data transfer 1
   
Entry  Fri Jan 31 13:48:29 2025, JB, AIDA analysis from HI-DESPEC meeting 20.11.2024 

AIDA analysis and presentation by J. Bormans for AIDA made in the HISPEC-DESPEC collaboration meeting.

 

https://docs.google.com/presentation/d/1hlZ30r294UqbVKGy3jg-wompFpc7TSfD/edit?usp=sharing&ouid=102131181856760114019&rtpof=true&sd=true

Entry  Fri Jan 31 09:37:47 2025, CC, TD, MP, Friday 31 January 26x
Implantation stack mounted - BB18(DS)-1000 + bPlas + bPlas + 3x BB7(DS)-1000

N.B. aida02, aida09 & aida15 have grounded copper screen (3M 1245 - aluminimum braid to copper screen of ribbon cables) for Kapton PCBs connecting the Samtec ribbon cables to the BB18 DSSSD.

n+n FEE64s aida02, aida04, aida06 and aida08 LK1 fitted
p+n FEE64s aida03 and aida07 LK3 fitted

BB7 aida10 (asics #1-2 p+n, #3-4 n+n)

BB18 p+n FEE64s 9-15, 1-3, 5-12 - n+n FEE64s 2-4 (L-R looking downstream) 

10.30 FEE64 power ON

      DSSSD bias ON (BB18 only) - attachment 1
       leakage current OK

      ASIC settings 2024Dec13-17.02.45 restored
       p+n FEE64 slow comparator 0xa, n+n FEE64 slow comparator 0xf

      Attachments 2-7 WR timestamp aida05 & aida12, system wide check
       aida12 & aida05 global clock status 6 - to be checked - OK for initial tests without merger
       WR decoder status aida02

      per FEE64 Rate spectra - attachment 8
       aida10 high rate - BB7 not biased
       rates OK for p+n FEE64s, rates high for n+n FEE64s - to be checked
       BNC PB-5 pulser ON to p+n FEE64s - no obvious adaptor PCB misalignments

      ADC data item stats - attachment 9
       rates generally OK
       aida10 high - BB7 not biased
       aida02 & aida04 n+n FEE64s - rates high - to be checked when bPlas install complete
       all p+n FEE64s connected to BB18 <10K except aida05 25k - very good!

      BNC PB-5 settings - attachment 10

      WR timestamps OK - attachment 11

      FEE64 temperatures OK - attachment 12

12.15 bPlas driver PCB installed, bPlas cabling and grounds *not* connected yet

      ADC data item stats - attachment 13
       all rates higher cf. attachment 9

      per FEE64 Rate spectra - attachment 14

      per p+n FEE64 1.8.L spectra - attachment 15
       aida09 pulser peak width 69 ch FWHM = 49keV FWHM 
       aida14 pulser peak width 50 ch FWHM = 35keV FWHM

      per p+n FEE64 1.8.W spectra - 20us FSR - attachments 16-17

      per n+n FEE64 1.8W spectra - 20us FSR - attachment 18

      DSSSD bias & leakage current OK - attachment 19
       ambient temperature +21.6 deg C, d.p. +0.4 deg C, RH 24.4%

      FEE64 temperatures OK - attachment 20

      DSSSD bias volatge & leakage current OK - attachment 21
       CAEN N1419ET ch#0 BB18, ch#1 BB7

      Install of bPlas drivers, cabling, grounds complete

      ADC data item stats - attachment 22
       
      per FEE64 Rate spectra - attachment 23
       all BB18 p+n FEE64s *except* aida05 show very low rates of noise

      per p+n FEE64 1.8.L spectra - attachment 24
       aida09 pulser peak width 62 ch FWHM = 42keV FWHM
       BB18 p+n FEE64s better electronic noise cf. p+n FEE64s not connected to a DSSSD

      per FEE64 1.8.W spectra - 20us FSR - attachments 25-26
ELOG V3.1.3-7933898