Jan 22, 2015

R61: 207Bi source spectra accumulated during one afternoon. Same settings as in R49 (alpha background run, 
elog entry 23) 

  + pulser: 0.5V, split and one of the signals inverted, and f=100 Hz.
  + threshold for slow comparators:
	- Eth(nnaida11)= 0x16
	- Eth(nnaida12)= 0x20
	- Eth(nnaida13)= 0x40
	- Eth(nnaida14)= 0x16

R62-R65: short runs with different amplitude for pulser (source still in):

 + R62: pulser @ 0.75 V
 + R63: pulser @ 1.00 V
 + R64: pulser @ 0.30 V
 + R65: pulser @ 0.18 V

R61 provides another point @ 0.5. V.


Raw data files saved in external drive (/media/data/TapeData/Test100/), and in UoEdinburgh disk space 
(/Disk/ds-sopa-personal/aestrade/data/AIDA/):

-rw------- 1 aestrade root 1177685085 Jan 21 16:55 R61_0.gz
-rw------- 1 aestrade root 1175087265 Jan 21 16:57 R61_1.gz
-rw------- 1 aestrade root 1176655505 Jan 21 17:00 R61_2.gz
-rw------- 1 aestrade root 1173848081 Jan 21 17:02 R61_3.gz
-rw------- 1 aestrade root 1180888194 Jan 21 17:05 R61_4.gz
-rw------- 1 aestrade root  168022642 Jan 21 17:05 R61_5.gz
-rw------- 1 aestrade root   77074827 Jan 22 13:12 R62_0.gz
-rw------- 1 aestrade root   45584289 Jan 22 13:12 R63_0.gz
-rw------- 1 aestrade root   42043231 Jan 22 13:12 R64_0.gz
-rw------- 1 aestrade root   41005241 Jan 22 13:12 R65_0.gz

 I've added the power supply change document.

Please have a look and let me know if it requires further clarification.

I have ordered some plastic "pot twiddlers".

I have run a simple test with the four FEE64 here + detector.

The sequence was :- 

Run the system with filtered PSU and record FWHM for 1.4.L for each of the four FEE64 boards.

Replace the PSU with a standard but with outputs set as per the attachement.

Results were approx 1.5 x worse.

Replace filtered PSU..... back as expected.

Addition: For Filter PSU only :- Set +5v to +6v when the FEE64 is not attached.

This is required as the extar impedance of the filter drops the voltage too much by the time it reaches the FEE64.

Log into the FEE64 module using telnet.

use root

enter =>  /usr/sbin/flash_unlock /dev/mtd2

MSL type BB18-1000 2998-22 bias +200V I_L +3.52uA


Detector bias CAEN N1419 Programmable HV Power Supply
  - FAGND isolated from AGND (AGND = NIM chassis ground)
  - floating HV supply, <5mV pp noise specification
  - configured + polarity, i.e. core to nnaida11 & nnaida12 MSL type BB18 n+n ohmic strips
                                braid to nnaida12 & nnaida13 MSL type BB18 p+n junction strips
  - configured bias voltage to 200V, max bias voltage 200V, max leakage current 20uA,
    trip 10s, ramp up/down 1V/s


BNC PB-5

amp 0.5V
atten x1
tau_d 1ms
freq 100Hz
pol - (output split via EG&G Ortec 433A to generate + polarity too)


PSU

Standard AIDA FEE64 PSU + new filter PCBs


Adaptor

nnaida11 & nnaida12 - polarity input (n+n ohmic strips)
  MSL type BB18 adaptor PCB rev 180713 LK 3 & 7
nnaida13 & nnaida14 + polarity input (p+n junction strips)
  MSL type BB18 adaptor PCB rev 290114 LK 1, 3, 5 & 7

+/- test inputs terminated by 50 Ohm

DSSSD grounded locally at nnaida12 & nnaida13 adaptor PCBs
by ground links LK 1 & 5

Adaptor PCB grounds connected by thick copper braid (see attached images)

FEE64

nnaida11 2b:09:ce
nnaida12 2b:09:e8
nnaida13 2b:09:07
nnaida14 2b:22:55

FEE firmware release 0x16cee018


ASIC parameters

  Default ASIC parameters (EXPERIMENT/AIDA/2014Aug13-13.44.58) except
  - shaping time 2us
  - slow comparator 64 (hex 40)
  - nnaida11 & nnaida12 preAmp reference 0x30 -> 0x38
    which will reduce linear output range but significantly stabilises
    negative polarity input ASICs


Typical pulser peak widths for nnaida11, 12, 13 and 14 c. 130-150ch FWHM.
Without the copper braid connecting the two adaptor PCBs the peak widths
are typically 200-250ch FWHM.



The problem observed last week (leakage current > 20uA, bias c. 3V, i.e. an
apparent 150k short) was found to be due to a fault on the n+n side FEE Adaptor
PCB rev 290114. Specifically the left hand connector was faulty. The exact
nature of the fault has not yet been determined but will be investigated.

For time being the rev 290114 PCB has been replaced by a rev 180713 PCB
with a 2-way IDC connector from the HV cable (core) to LK1.

Jan20-21, 2015


R49_* are a set of files corresponding to an overnight background measurement, with goal of detecting alphas
from uranium decay chain contaminants.

The settings of ASICs are attached as a screenshot. The low comparator thresholds are (see previous entry):
 nnaida#11= 0x16
 nnaida#12= 0x40 
 nnaida#13= 0x20
 nnaida#14= 0x16

For a significant fraction of the measurement, NNAIDA12 and NNAIDA13 were not generating good data. We 
didn't
invest much time in solving the issue, as it's recurrent problem with NNAIDA12, but it seems some ASICS went
back to normal behavior overnight.

Due to limited storage space, data in external drive (/media/data/TapeData/Test100/), and backued up 
temporarly
in Edinburhg (/Disk/ds-sopa-personal/aestrade/data/AIDA/).

A pulser walkthrough for this setting is available in runs R61-R65 (see next elog entry).



++ DATA ANALYSIS ++

A fraction of the runs (R49_1, R40_10-14) were analysed with the 'beta' version of the Root sort code for 
event
reconstruction (/homes/npg/AIDAsort/). The code creates events from data bits that fall within a window of
50usec, and included the additional requirement that the calibrated energy of each ADC hit should be E>1500 
keV.

Output from Root sort code saved here:

aestrade: AIDA $ pwd
/Disk/ds-sopa-personal/aestrade/rootfiles/AIDA
aestrade: AIDA $ ls R49_alpha_bckgr*
R49_alpha_bckgr_10_calib_log.txt  R49_alpha_bckgr_13_calib.root
R49_alpha_bckgr_10_calib.root     R49_alpha_bckgr_13_event_log.txt
R49_alpha_bckgr_10_event_log.txt  R49_alpha_bckgr_13_event.root
R49_alpha_bckgr_10_event.root     R49_alpha_bckgr_14_calib_log.txt
R49_alpha_bckgr_11_calib_log.txt  R49_alpha_bckgr_14_calib.root
R49_alpha_bckgr_11_calib.root     R49_alpha_bckgr_14_event_log.txt
R49_alpha_bckgr_11_event_log.txt  R49_alpha_bckgr_14_event.root
R49_alpha_bckgr_11_event.root     R49_alpha_bckgr1_calib_log.txt
R49_alpha_bckgr_12_calib_log.txt  R49_alpha_bckgr1_calib.root
R49_alpha_bckgr_12_calib.root     R49_alpha_bckgr1_event_log.txt
R49_alpha_bckgr_12_event_log.txt  R49_alpha_bckgr1_event.root
R49_alpha_bckgr_12_event.root     R49_alpha_bckgr1_sort_log.txt
R49_alpha_bckgr_13_calib_log.txt  R49_alpha_bckgr1_sort.root

A few plots from these data:

R49few_a_bckgrnd_multiplicity.png: Shows the multiplicity of reconstructed events. Peaks corresponding to
multiples of 64 are clear from pulser (64 ch/asic, although one FEE has some channels off so peaks shifted).
There is also peak at low multiplicity where gate to search for events can be placed. The events with very 
high
multiplicity indicate the time window used is too large, so we get random coincidences or high count from 
noisy
channels. The lower plots show how the energy sum increases linearly with the multiplicity of the event

R49few_a_bckgrnd_xy.png: Plots for the calculated mean strip for hits on each side (<x>: nnaida#11 and #12, 
<y>:
nnaida#13 and #14). The different plots have different condition applied. Top left only requires 
multiplicity on
x and y greater than zero (i.e., a hit for each side). The others require low multiplicity, or low spread of 
the
timestamp of the hits included (spread dts<10usec), and also mask out hits with x value of 18 or 101 (very 
high
count channels)

R49few_a_bckgrnd_dt_event.png: The difference of the time-stamp for hits with lowest and highest time-stamp
within each event. 50 usec is the event window considered (so highest possible value). Note that events with
multiplicity 2 (1 hit in x, and 1 hit in y) have almost exclusively a spread of very few clock cycles.

R49few_a_bckgrnd_EfEb.png: Energy front vs energy back spectra, with some of the conditions described above
(e.g. low multiplicity, or multi=2, low spread in time-stamp). All have hits with x=78 and 102 excluded. The
most clean spectra is top-right (one hit in x, one hit in y), but shows only a couple of hits with good 
energy
in both sides.

Jan 20, 2015

Test settings: DSSD biased at 100V, with 3.5 uA leakage current. Pulser at 0.5 V, split and inverted for both
positive and negative polarity. Frequency at 100 Hz.


++SHAPING TIME++

We varied shaping time (Tsh), and adjusted hold time (Th) accordingly. We measured the width of pulser spectra
for two channels using 'integrate' function of spectrum browser.

 Tsh	 Th	nnaida#11-2.6L	nnaida#13-2.6L
[usec]	[usec]	 FWHM [ch]	 FWHM [ch]
0.5	2	146		109
1	2	133		113
2	2	131		116
4	6	130		126
8	8	145		136

note: Tsh= ( 0.5*offset9 + 0.5) usec, Th= 2*offset7 usec

The first two data points where saved to file R44_0.gz, and R45_0.gz. Starting from the Tsh=2usec measurement,
NNAIDA#12 was causing communication issues with the merger/tape server, so we don't have files for last few.

Due to limited storange in AIDA PC, data was stored to external drive provided by Vic
(/media/data/TapeData/Test100/), and backued up temporarly also in Edinburhg
(/Disk/ds-sopa-personal/aestrade/data/AIDA/).


++THRESHOLDS++

Next step was to adjust threshold of the slow comparator, in order to lower them and take data looking for
background alpha radioactivity. 

At this point NNAIDA#13 had stopped producing data (probably similar issue as NNAIDA#12, which could be
recovered with power cycling FEEs), so we used nnaida#14

FEE		Eth	rate/channel	integral(pulse peak):integral(noise peak)
nnaida#11	0x40	115 Hz (~only pulser)
nnaida#14	0x40	115 Hz(~only pulser)

nnaida#14	0x20	~350 Hz			2:1

nnaida#11	0x10	~150 Hz			1:2	(one channel very noisy @ 15kHz)
nnaida#14	0x10	~5 kHz (asic 1-3)	80:1
		0x10	~3kHz-100 Hz (asic 4)


For background run (see next elog entry) threshold values set at:
 nnaida#11= 0x16
 nnaida#12= 0x40 
 nnaida#13= 0x20
 nnaida#14= 0x16

Trying the AIDA format power supply with the simple filters installed.

The detector is attached and HV of 200v@3.8uA

Using one channel from each FEE64 as a guide to compare performance. Using the Integrate analysis function Peak width.

With the bench power supply and the restored setup for the ASICs.

FEE64 #11:1.4.L:311, #12:2.8.L:183, #13:1.4.L:202, #14:1.4.L:342

Change to the filtered power supply

FEE64 #11:1.4.L:345, #12:2.8.L:414, #13:1.4.L:311, #14:1.4.L:476

Add Braid between the LEMO00 connectors on the two adaptor boards using "croc" clips.

FEE64 #11:1.4.L:172, #12:2.8.L:141, #13:1.4.L:106, #14:1.4.L:161

Change the shaping time of all the ASICs from 0.5uS to 5uS

FEE64 #11:1.4.L:128, #12:2.8.L:127, #13:1.4.L:119, #14:1.4.L:199

I think this means the AIDA power supply with the simple filters is equivalent or better than the bench supply.

Good news I think.....

It needs a more extensive test ( more channels ? )

Measured IV curve for BB18 DSSD with new CAEN HV supply. Settings as in previous elog entry:

Detector bias CAEN N1419 Programmable HV Power Supply
  - FAGND isolated from AGND (AGND = NIM chassis ground)
  - floating HV supply, <5mV pp noise specification
  - configured + polarity, i.e. core to nnaida11 & nnaida12 MSL type BB18 n+n ohmic strips
                                braid to nnaida12 & nnaida13 MSL type BB18 p+n junction strips



Data (see attachment):
V [V]	I [uA]
3	1.34
6	1.62
9	1.81
12	1.97
15	2.1
18	2.21
21	2.31
24	2.39
27	2.46
30	2.52
35	2.61
40	2.68
45	2.73
50	2.77
55	2.8
60	2.82
70	2.86
80	2.91
90	2.94
100	2.97
110	3
120	3.06
130	3.12
140	3.18
150	3.26
160	3.34
170	3.43
180	3.53
190	3.62

Configuration per Elog entries:

https://elog.ph.ed.ac.uk/AIDA/3
https://elog.ph.ed.ac.uk/AIDA/4

- except -

FEE firmware
  - reverted release 0xa4ed006
    as used at RIKEN due to stability/data issues with most recent releases

Detector bias CAEN N1419 Programmable HV Power Supply
  - FAGND isolated from AGND (AGND = NIM chassis ground)
  - floating HV supply, <5mV pp noise specification
  - configured + polarity, i.e. core to nnaida11 & nnaida12 MSL type BB18 n+n ohmic strips
                                braid to nnaida12 & nnaida13 MSL type BB18 p+n junction strips
  - configured bias voltage to 200V, max bias voltage 200V, max leakage current 20uA,
    trip 10s, ramp up/down 1V/s
  - bias 200V, leakage current 4.9-5.1uA 

ASIC parameters

  Default ASIC parameters (EXPERIMENT/AIDA/2014Aug13-13.44.58) except
  - shaping time 5us
  - slow comparator 20 (hex 14)

R31

  - 207Bi source (serial AD6201) mounted c. 3cm from MSL type BB18 DSSSD 
  - p+n junction side faces 207Bi source
  - source serial number *away* from DSSSD

  - Pulser BNC PB-5
    fall time 1ms
    rate 10Hz
    delay 250ns
    ampl 1.00000V
    polarity -
    pulse top tail
    atten x1

    positive polarity test input via EG&G Ortec 433A

R32

  - 207Bi source (serial AD6201) mounted c. 3cm from MSL type BB18 DSSSD 
  - p+n junction side faces 207Bi source
  - source serial number faces DSSSD

Attachments 1-20 from R32

Performed pulser measurements with test setup at Daresbury lab, with main purpose of remembering how to operate the system! The status is similar to what Chris observed in Elog entry #14. Confirmed ASIC settings as in entry#4 of elog.

 

 

 

 New VHDL loaded in NNAIDA#11,#12,#13,#14: /MIDAS/Aida/FEE_Riken_Apr14_21.bin

 A late entry for the work I carried out on Thursday.

With the Emco box providing the HV, the pulser peak showed double (or triple) peaks. This was not seen with the SY1527 so I thought this would be better for looking at peak widths.

Same ASIC settings my previous entry, and a HV of 200V with leakage current 3.8uA.

I varied the shaping time in each module using the ASIC4 control page as this also changes the hold time automatically. Slow comparitor threshold of 64.

Checked each module and took sample channels from a couple of ASICs in each but made qualitative comparisons with random channels in all ASICs to make sure the chosen ones were representative of the ASIC/module as a whole.

Tables and graphs are included below for nnaida11 and 13. nnaida13 showed a high level of low E noise on some spectra, but the pulser peaks were always well defined single peaks.

nnaida12 showed noises across the full range of many spectra in all ASICs apart from ASIC4. Patrick suggested this module may possibly be suffering and need replacing. A quick scan through some channels showed:

• average peak width @ shaoing time of 0.5us of ~150-180 ch
• same at shaping times of 2.5 and 4.5us. Noise present over full range throughout

My taxi was arriving so I didn't have chance to go through nnaida14 in depth, but a quick scan showed peak widths within ~10-15ch of those seen in nnaida13.

Assembled three more of the filter boards and installed them in the AIDA PSU with the first, wired to use the switchmode power supply.

Powered up nnaida14 first and went fine. Just the boot sequence and measure the voltages for stability.

Powered up the remainder and all was well.

Setup and go..... the rates were way too high in all of them.

nnaida12 was running at 200k/sec+ most of the time.

The other three could be reduced in rate by changing the slow comp thresh as would be expected but 12 wasn't any good.

Tried:

Remove MACB HDMI.... no good

isolate psu earth from NIM crate ( put psu on foam support ) ..... no good

Checked the filter output and the sine wave reported yesterday ( nnaida2 ) was present on all voltage rails but no evidence of high frequency noise.

Set all channels to 1GeV,  with Slow comp thresh of 10, and 11,13 & 14 showed roughly the same rate of 10 to 15k/sec. Peaks in the spectra were FWHM 12 at a random sample. nnaida12 would not conform.

Changed back to the bench power supply connections so Chris can continue.

Kept largely the same settings at the entry https://elog.ph.ed.ac.uk/AIDA/4

Same ASIC settings

Emco used to provide HV

HV+ --> nnaida11 & nnaida12 (p+n strips, -ve pulser input)

HV- --> nnaida13 & nnaida14 (n+n strips, +ve pulser input)

Stat spectra look roughly the same as those included in the above entry.

 Measuring the signal at the FEE64 end.

+5v , -6v , +7v, +7v 

The two other 'scope channels are connected by FET probes to the FEE64. I now see there is a ground connection.... so i will remove it and re-measure the signals in the filter.

 No real difference.

Measuring at the FEE64 and the spikes when the Mux ADC is reading out have disappeared. 

2.0.L FWHM:14.26

2.15.L ( 270pF )  FWHM : 119.04

(ooops found the 'scope channel was on 20Mhz BW filter ) 

DC measurements.

At FEE64 :- +7.822 , -6.36, +4.937

at Filter output ( AIDA Cable input )  :- +7.96, -6.46, 5.37

at filter input:- +7.97, -6.476, +5.488

Set supply with these voltages and add filter.

Measured earth point to mains earth pin as 0.095ohms.

Power-up with nnaida2. ADCs Calibrate fine....successful boot.

Voltages at FEE64:- +7.802, -6.324, +4.887. I will adjust the power supply voltages to match the FEE64 previous setup.

2.0.L FWHM :13.83

2.15.L FWHM:116.6

So not really a difference in performance at this simple level.

Attached are some oscilloscope traces of the six voltage rails after the filter on the filter board. +5v & 0v , -6v & 0v, +7v & 0v relative to the earth on the filter board. 

Attached are some oscilloscope traces of the six voltage rails before the filter on the filter board. +5v & 0v , -6v & 0v, +7v & 0v relative to the earth on the filter board.

There is a nice sine wave at 235KHz that needs to be finished off perhaps. Otherwise the filter seems to be doing well.

Next set of 'scope traces are across the three supplies. +7v, -6v, +5v.

Sine wave is present ( 220KHz )  at 80mv, 80mv, 105mv.

Next I'll try this supply on nnaida12 ( detector negative ) ...... next entry .... 

The new pcb for the power supply filter arrived.

I assembled the components ( after finding the whoops ) and connected it to the bench power supply for nnaida2.

nnaida2 functions just about the same as before but the power supply filter results seem amazing.

I have measured the signals on the power supply before and after the filter.

The 'scope is referenced to earth on the filter board and this earth is connected to earth through the +5v@10A supply.

Before the filter the average noise on the rail ( AC coupled ) is 33mV and after is ....... 5mV pretty exciting stuff.

 I have attached the two 'scope pictures.

The same measurements on the +7v, -6v and 0v rails give similar improvements.

The choke on the +5v rail measures 34 degrees C so care will need to be taken.

Next I will measure the voltage drops across the filter and decide on the correct voltage settings for the AIDA switch mode power supply.

Then install the filter into the supply and check ..... and check ......

Disconnected the adaptors with the detector.

Added the adaptors with the kapton cables only attached.

Connected the pulser outputs ( pos and neg ).

nnaida11,13 & 14 : Stat spectra are normal. Rates are 10k to 16k

nnaida12 has normal stat spectrum with ASIC3 only showing channel 5.

Power cycle and re-try.

No different.
Suggest change the Mezzanine on nnaida12 and ask for the ASIC to be replaced..... maybe visible signs of problem ?

I have been wondering if the 0v path from the FEE64s to the MACB where they are joined is a possible problem.

I have been contemplating an isolated LVDS interface for the 50Mhz clock to test the idea.

Fortunately i recalled the 50Mhz internal oscillator in each FEE64.

I have disconnected the FEE64s from the MACB and run them using their internal 50Mhz clok.

No apparent change in performance.....

With Detector on. Using 'little block' HV supply. 11&12 with pre-amp ref set at 0x30.

The rates are as follows:-

nnaida11: 19k

nnaida12: 52k

nnaida13: 10k

nnaida14: 10k

The stat spectra of 13 & 14 look ok.

The stat spectra of 11 and 12 are strange and noisy but not "mad".

Maybe when the power supply filters are in place this can be revisited

While investigating a VHDL conundrum I have noticed that the Mux ADC serial readout clock has a 'FAST' slew rate on ASICs 1&2 and a normal slew rate on ASICs 3&4.

Is it possible that the higher slew rate is actually better filtered by the ASIC de-coupling etc than the slower one.

Unfortunately I can't  try this out yet as the "conundrum" means the VHDL version isn't good enough just yet.

Hopefully today.....

Patrick