Fri Aug 4 10:04:58 2023, TD, Friday 4 August contd. 17x
|
10.45 Power cycle and reboot
DSSSD bias +100V leakage current +8.365uA
All system wide checks OK
Slow comparator 0x64
per FEE64 rate spectra - attachment 1
per FEE764 1.8.W spectra - attachments 16 & 17 ( ignore attachments 2 & 3 - bias off/low )
adc data item stats - attachment 4
slow comparator 0xf
per FEE64 rate spectra - attachment 5
adc data item stats - attachment 6
slow comparator 0xe
per FEE64 rate spectra
adc data item stats - attachment 7
slow comparator 0xd
per FEE64 rate spectra - attachment 8
adc data item stats - attachment 9
slow comparator 0xc
per FEE64 rate spectra - attachment 10
adc data item stats - attachment 11
slow comparator 0xb
per FEE64 rate spectra - attachment 12
adc data item stats - attachment 13
slow comparator 0xa
per FEE64 rate spectra - attachment 14
adc data item stats - attachment 15 |
Fri Aug 4 09:07:08 2023, TD, Friday 4 August 23x
|
07.00 DAQ stopped
Overnight run for background alphas
10.07 FEE64 temperatures OK - attachment 1
DSSSD bias +100V leakage current +8.210uA - attachment 2
Stats - attachments 3-12
per FEE64 1.8.W spectra 200us FSR - attachments 21-22
per FEE64 rate spectra - attachment 23 |
Thu Aug 3 14:16:12 2023, TD, Thursday 3 August contd. 21x
|
15.16 DSSSD bias +100V leakage current +8.415uA
ThorLabs filters removed
Test + & test - signals disconnected at outputs of BNC PB-5 and EG&G Ortec 534
aida02 & aida04 LK1 installed, aida01 LK3 not installed
aida03 LK3 installed
test + & test- daisy chains installed
HV daisy chain - core - aida12, aida03, aida11
HV daisy chain - braid - aida04
slow comparator 0xa p+n FEE64 rates high ( 50-125k )
per FEE64 rates - attachment 1
per FEE64 1.8.W spectra 200us FSR - attachments 2-3
adc data item stats - attachment 4
slow comparator 0xc p+n FEE64 rates OK ( 15-40k ) dominated by 'hot' channels, low per channel rates in aida11, aida03, aida12
per FEE64 rates - attachment 5-6
adc data item stats - attachment 7
slow comparator 0xf p+n FEE64 rates low ( 7-17k ) entirely dominated by 'hot' channels
per FEE64 rates - attachment 8
adc data item stats - attachment 9
slow comparator 0x14
per FEE64 rates - attachment 10-11
adc data item stats - attachment 12
slow comparator 0x19
per FEE64 rates - attachment 13
adc data item stats - attachment 14
slow comparator 0x1e
per FEE64 rates - attachment 15
adc data item stats - attachment 16
slow comparator 0x23
per FEE64 rates - attachment 17
adc data item stats - attachment 18
slow comparator 0x28
per FEE64 rates - attachment 19-20
adc data item stats - aattachment 21
Ignoring 'hot' channels, reduce rates to < 50Hz/channel for p+n slow comparator threshold 120-150keV and n+n slow comparator threshold 350-400keV
If we assume that this estimates the 5x sigma threshold => p+n sigma c. 27keV rms, 64keV FWHM and n+n sigma c. 75keV rms, 176keV FWHM
Given FEE64-DSSSD cable lengths, optimal p+n performance is c. 40-50keV FWHM so current tests begin to approach this - little extrinsic noise observed for preamp signals
We continue to observe significant ( though very much improved ) extrinsic noise for n+n strips so current noise performance could be improved by x2-3.
18.42 slow comparator 0x64
stats & histograms zero'd
DSSSD bias +100V leakage current +9.040uA |
Thu Aug 3 09:21:26 2023, TD, Thursday 3 August 47x
|
10.20 DSSSD bias +100V leakage current +6.565uA - attachment 1
All system wide checks OK - attachments 2-7
why is SYNC rollover target 0xe?
FEE64 temps OK - attachment 8
per FEE64 1.8.W spectra 20us FSR - attachments 9-10
slow comparator 0x64
per FEE64 rate spectra - attachment 11
ADC data item stats - attachment 12
slow compararator 0x14
ADC data item stats - attachment 13
11.10 Test + & test - cables disconnected at the outputs of the BNC PB-5 and EG&G Ortec 534
slow comparator 0xf p+n rates dominated by 'hot' channels *except* aida03 & aida09
per FEE64 rate spectra - attachment 14
ADC data item stats - attachment 15
slow comparator 0xa p+n rates high ( 100-200k )
per FEE64 rate spectra - attachment 16
ADC data item stats - attachment 17
slow comparator 0x14 p+n rates entirely due to 'hot' channels
per FEE64 rate spectra - attachment 18
per FEE64 1.8.W spectra 20us FSR - attachments 19-20
ADC data item stats - attachment 21
11.27 Remove ground cable from Al base plate to aida02 FEE64 adaptor PCB
slow comparator 0xf p+n rates entirely due to 'hot' channels
per FEE64 1.8.W spectra 20us FSR - attachments 22-23
per FEE64 rate spectra - attachment 25
ADC data item stats - attachment 24
slow comparator 0xa p+n rates high ( 30-130k ) but lower than previously
per FEE64 rate spectra - attachment 26
ADC data item stats - attachment 27
11.48 DSSSD bias +100V leakage current +7.845uA
Remove LK3 ( local HV ground middle Si wafer )
slow comparator 0xa p+n rates high ( 55-135k ) but increase in rates appears to be due to 'hot' channels
per FEE64 1.8.W spectra 20us FSR - attachments 28-30
per FEE64 rate spectra - attachment 31
ADC data item stats - attachment 32
CAEN N1419ET ch #2 output connected to Tek TDS 210 DSO - powered from relay #6
ch 1 - ac - HV braid
ch 2 - ac - HV core
ch # 2 OFF - attachment 33
ch # 2 + 50V 0.000uA - attachments 34-35
with additional ThorLabs filter
ch # 2 + 50V 0.000uA - attachment 39
ch 2 - dc, hi Z
test - attachments 36-37
test + attachment 38
12.45 Install ThorLabs filter HV core ( *no* filter for HV braid )
slow comparator 0xa p+n rates high ( 40-130k ) but p+n rates dominated by 'hot' channels *except* aida03, aida11, aida12 where rates are generally higher per strip
per FEE64 rate spectra - attachment 40
per FEE64 1.8.W spectra 20us FSR - attachments 41-42
ADC data item stats - attachment 43
14.55 Install ThorLabs filter HV braid ( filters for both HV core & braid )
slow comparator 0xa p+n rates high ( 50-150k ) two filters probably somewhat worse than one filter
per FEE64 rate spectra - attachment 46
per FEE64 1.8.W spectra 20us FSR - attachments 44-45
ADC data item stats - attachment 47
Overall, effect of ThorLabs filters appears to belimited. Perhaps not unexpected as FEE64 adaptor PCBs also have a HV RC filter.
|
Wed Aug 2 15:39:52 2023, TD, Wednesday 2 August contd. 11x
|
16.22 Add LK1 to aida01
DSSSD bias -100V leakage current -7.950uA
Slow comparator 0x14
per FEE64 1.8.W spectra 200us FSR - attachments 2-3
ADC data item stats - attachment 4
per FEE64 rate spectra - attachment 1
Noise worse for n+n FEE64s esp. aida04
17.28 Ground Al base plate to aida02 FEE64 adaptor PCB - appears to be marginally worse than without ground
per p+n FEE64 1.8.L spectra - attachments 8-9
aida01 pulser peak width 116 ch FWHM
per FEE64 1.8.W spectra 200us FSR - attachments 10-11
per FEE64 rate spectra - attachment 6-7
ADC data item stats - attachment 5 |
Wed Aug 2 08:44:00 2023, TD, Wednesday 2 August 48x
|
09.40 Al snout electrically connected ( < 1 Ohm ) to Al gasket and Al base plate
Al snout electrically isolated ( > 20 MOhm ) from aida02 FEE64 adaptor PCB and AIDA support frame
FEE64 temperatures OK - attachment 1
DSSSD bias +100V leakage current +7.565uA - attachment 2
All system wide checks OK
Slow comparator 0x64
per FEE64 rate spectra - attachment 3
per p+n FEE64 1.8.L spectra - attachments 4-5
aida01 pulser peak width 134 ch FWHM
per FEE64 1.8.W spectra 200us FSR - attachments 6-7
ADC data item stats - attachment 8
Slow comparator 0x14
ADC data item stats - attachment 9
per FEE64 rate spectra - attachment 10
Ground Al base plate to aida02 FEE64 adaptor PCB - appears to be marginally worse than without ground
per p+n FEE64 1.8.L spectra - attachments 11-12
aida01 pulser peak width 120 ch FWHM
per FEE64 1.8.W spectra 200us FSR - attachments 13-14
per FEE64 rate spectra - attachment 15
ADC data item stats - attachment 16
11.48 DSSSD bias +100V leakage current +11.055uA
Ground Al base plate to AIDA support frame - appears to be significantly worse than without ground
per FEE64 1.8.W spectra 200us FSR - attachments 17-18
per p+n FEE64 1.8.L spectra - attachments 19-20
aida01 pulser peak width 150 ch FWHM
per FEE64 rate spectra - attachment 21
ADC data item stats - attachment 22
11.48 DSSSD bias +130V leakage current +35.05uA
Ground Al base plate to aida02 FEE64 adaptor PCB - additional bias makes no significant difference
per FEE64 rate spectra - attachment 23
per p+n FEE64 1.8.L spectra - attachments 24-25
aida01 pulser peak width 118 ch FWHM
per FEE64 1.8.W spectra 200us FSR - attachments 26-27
ADC data item stats - attachment 28
14.03 DSSSD bias +100V leakage current +10.7uA
Ground Al base plate to aida02 FEE64 adaptor PCB - re-check
per FEE64 1.8.W spectra 200us FSR - attachments 28-29
ADC data item stats - attachment 30
15.10 Add DSSSD HV cable from aida04 to aida02 - significantly worse
Ground Al base plate to aida02 FEE64 adaptor PCB - re-check
per FEE64 1.8.W spectra 200us FSR - attachments 31-32
ADC data item stats - attachment 33
15.37 Switch from - to + polarity detector HV
N1419ET from ch #3 to ch #2, all outputs non-floating
LK1 ( local HV ground )removed from aida12, aida03, aida11 - installed aida04
LK3 ( DSSSD PCB ground ) installed aida03 ( no change )
HV #1 core aida12, aida03, aida11 - braid aida04
test + chain aida9, aida01, aida10, aida12, aida03, aida11 - connected to BNC PB-5 pulser
test - chain aida04, aida02 - not connected to pulser
AIDA PSU cabling per https://elog.ph.ed.ac.uk/AIDA/879
HV cable aida04 to aida02 - removed
Ground Al base plate to aida02 FEE64 adaptor PCB - removed
FEE64 temperatures OK - attachment 35
DSSSD bias -100V leakage current -7.155uA - attachment 36
Slow comparator 0x14
per FEE64 rate spectra - attachment 37
per p+n FEE64 1.8.L spectra - attachments 38-39
aida01 pulser peak width 123 ch FWHM but note double peaking
per FEE64 1.8.W spectra 200us FSR - attachments 40-41
ADC data item stats - attachment 42
Slow comparator 0x64
ADC data item stats - attachment 43
Very similar performance to + polarity DSSSD HV tests
16.05 Add LK1 to aida02
DSSSD bias -100V leakage current -7.770uA
Slow comparator 0x14
per FEE64 1.8.W spectra 200us FSR - attachments 44-46
ADC data item stats - attachment 47
per FEE64 rate spectra - attachment 48
Improved noise for n+n FEE64s esp. aida04 |
Tue Aug 1 08:50:36 2023, TD, Tuesday 1 August 30x
|
09.50 DSSSD bias +100V leakage current +9.255uA - attachment 2
FEE64 temperatures OK - attachment 1
All system wide checks OK
per FEE64 1.8.W spectra 20 & 200us FSR - attachments 3-6
per p+n FEE64 1.8.L spectra - attachments 7-8
aida01 pulser peak width 87 ch FWHM
adc data item stats - slow comparator 0x64, 0x14, 0xa - attachments 15, 14, 11
per FEE64 rate spectra - attachments 9-10, 12-13
from https://elog.ph.ed.ac.uk/AIDA/872
13x FEE64s installed - see attachment 2 ( courtesy NH )
FEE64 # Cable set #
1 1
2 2
3 3
4 4
5
6 6
7
8 8
9 9
10 5
11 11
12 7
15
Change AIDA PSU cabling from
#1 1-3 2-4 5-6 7-8
#2 9-10 11-12 13-14 15-16
to
#1 1-3 2-4 5-7 9-11
#2 6-8 10-12 13-14 15-16
DSSSD bias +100V leakage current +11.765uA
per FEE64 1.8.W spectra 200us FSR - attachments 16-17
per p+n FEE64 1.8.L spectra - attachments 18-19
aida01 pulser peak width 158 ch FWHM ( note double peaking )
adc data item stats - slow comparator 0x64, 0x14 - attachments 23, 21
per FEE64 rate spectra - attachments 20, 22
DSSSD bias +30V leakage current +35.8uA
13.35 DSSSD bias +100V leakage current +11.785uA
aida04 34-way cable #1 connected to ASIC #1 & 2 disconnected from adaptor PCB
per FEE64 1.8.W spectra 2000us FSR - attachments 26-27
adc data item stats - slow comparator 0x64, 0x14 - attachments 29-30
per FEE64 rate spectra - attachment 28
16.20 Install LK2 & LK4 aida12, aida03, aida11 ( front & rear field plate ground )
DSSSD over current ( 200uA @ c. 30V ) - high resistance short?
LK2 & LK4 installed aida12 *only* - OvC
LK2 & LK4 installed aida11 *only* - OvC
LK2 & LK4 installed aida3 *only* - OvC
LK2 installed aida3 *only* - OvC ( LK2 = rear field plate )
All front & rear field plate connections appear to provide a high resistance short to ground for detector bias. This may be related to issues observed biasing DSSSD via aida01 & aida09 - https://elog.ph.ed.ac.uk/AIDA/874
But why does it affect aida12 too? |
Mon Jul 31 09:43:37 2023, TD, Monday 31 July 44x
|
10.43 DSSSD bias +100V leakage current +7.550uA
+ bias - core aida04, braid aida12, LK1 ( HV local ground ) fitted aida03, aida11 *not* aida12
bias bonds aida01 and aida09 probably broken
aida03 LK3 ( DSSSD PCB ground ) fitted
ASIC settings 2021Apr29-13-16-00
slow comparator 0x64
FEE64s 1, 3, 9, 10, 11, 12 + input polarity
FEE64s 2, 4, 6, 8 - input polarity
BNC PB-5 pulser
amplitude 1.0V
attenuation x1
tail pulse
tau_d 1ms
frequency 100Hz
polarity +
EG&G Ortec 534 Sum & Invert Amplifier
to provide - polarity test inputs
Test + and - signals daisy-chained to FEE64s - end of daisy-chain terminated by 50 Ohms.
Adaptor PCB
AIDA Half Rev B 180623 fitted FEE64s 1, 2, 3, 4, 9, 10, 11, 12
AIDA Half Rev A 120418 fitted FEE64s 6, 8
AIDA Half rev A adaptor PCBs aida06 & aida08 - not connected to ribbon cable/test/HV
DSSSD #1 - adaptor PCB ribbon cable drain wires connected to respective adaptor PCB ground
DSSSD #2 ( not installed ) adaptor PCB ribbon cable and ribbon cable drain wires floating
AIDA Half rev B adaptor PCBs DSSSD#1 - FEE64 cooling plate - adaptor PCB ground *not* connected
AIDA Half rev A adaptor PCBs aida06 & aida08 - not connected to ribbon cable/test/HV - FEE64 cooling plate - adaptor PCB ground fitted
ground to AIDA support frame *not* connected
test + / test - *not* connected
per FEE64 1.8.W spectra 20 & 200us FSR - attachments 1-2, 14-15
per FEE64 p+n junction 1.8.L spectra - attachments 3-4
aida01 pulser peak width 136 ch FWHM ( note double peaking )
per FEE64 rate spectra - attachment 5
no test - input
adc data item stats - attachment 6
slow comparator 0x64
note aida04 asic #1 u/s
system wide checks - *all* OK - attachments 7-11
FEE64 temps OK - attachment 12
DSSSD bias - attachment 13
adc data item stats - attachment 16
slow comparator 0x14
12.28 LK1 ( local HV ground ) removed from aida03 & aida11 ( already removed from aida12 )
adc data item stats
per FEE64 1.8.W spetcra 20us FSR - attachments 17-19
DSSSD bias +100V leakage current +6.525uA
14.40 DSSSD bias +100V leakage current +6.230uA
LK1 ( local HV ground ) installed aida12 *only*
adc data item stats
per FEE64 1.8.W spectra 20us FSR
per p+n FEE64 1.8.L spectra - attachments 20-24
aida12 pulser peak width 196 ch FWHM
14.40 DSSSD bias +100V leakage current +11.485uA
LK1 ( local HV ground ) installed aida03, aida11, aida12
adc data item stats - slow comparator 0x64
per FEE64 rate spectra
per FEE64 1.8.W spectra 20us FSR
per p+n FEE64 1.8.L spectra - attachments 25-30
aida12 pulser peak width 135 ch FWHM ( note double peaking )
adc data item stats - slow comparator 0x14
per FEE64 rate spectra
p+n FEE64 rates dominated by edge strips
per FEE64 1.8.W spectra 200us FSR
per p+n FEE64 1.8.L spectra - attachments 31-35
17.15 Test - disconnected from pulser
Connect test daisy chain cable from aida04 to aida02 (50 OHm termination)
adc data item stats - slow comparator 0x14 & oxa
per FEE64 rate spectra - slow comparator 0x14
p+n FEE64 rates dominated by edge strips
per FEE64 1.8.W spectra 200us FSR
per p+n FEE64 1.8.L spectra - attachments 36-44
aida01 pulser peak width 89 ch FWHM
|
Mon Jul 24 08:54:48 2023, TD, Monday 24 July 17x
|
09.54 DSSSD#1 bias +100V leakage current +9.065uA
ADC data item stats
per FEE64 1.8.W spectra 20us & 200us FSR - see attachments 1-5
10.02 aida04 asic#1 u/s - see attachments 6-7
10.39 AIDA PSU#1 FEE64s 1,2 3, 4, 5, 6, 7, 8 -> 1, 3, 2, 4, 5, 6, 7, 8
ADC data item stats ( slow comparator 0x64 & 0x14 )
per FEE64 1.8.W spectra 20us & 200us FSR - see attachments 8-12
11.08 Test + connected aida09, 01, 10, 12, 3 & 11
SSSD#1 bias +100V leakage current +12.150uA
ADC data item stats ( slow comparator 0x14 )
per FEE64 rate, 1.8.L & 1.8.W spectra 20us FSR - see attachments 13-18
aida01 pulser peak width 134 ch FWHM |
Mon Jul 24 08:39:39 2023, TD, aida10 sys console output & aida10 options 
|
Options and system cosnole disagree about which version of the DataAcq program is in use? |
Sun Jul 23 08:50:48 2023, TD, Sunday 23 July 19x
|
09.50 Cooknell HV2
2x + polarity, grounded HV channels
+ bias - core aida04, braid aida12, LK1 ( HV local ground ) fitted aida12, aida03, aida11
bias bonds aida01 and aida09 probably broken
aida03 LK3 ( DSSSD PCB ground ) fitted
AIDA Half rev A adaptor PCBs aida06 & aida08 - not connected to ribbon cable/test/HV
DSSSD #1 - adaptor PCB ribbon cable drain wires connected to respective adaptor PCB ground
DSSSD #2 ( not installed ) adaptor PCB ribbon cable and ribbon cable drain wires floating
AIDA Half rev B adaptor PCBs DSSSD#1 - FEE64 cooling plate - adaptor PCB ground *not* connected
AIDA Half rev A adaptor PCBs aida06 & aida08 - not connected to ribbon cable/test/HV - FEE64 cooling plate - adaptor PCB ground fitted
ground to AIDA support frame *not* connected
test + / test - *not* connected
DSSSD#1 3208-3/-21/-22
bias +100V leakage current +8.7uA - attachments 1-11
per FEE64 1.8.W spectra 20us & 200us FSR
09.58 + bias - core aida04, braid aida12, LK1 ( HV local ground ) *not* fitted aida12 & fitted aida03, aida11
see attachments 12-14
17.00 aida04 *only* adaptor PCB connected to AIDA support frame
FEE64 ADC data item stats > 200k for all FEE64s
17.45 FEE64 spower cycled
CAEN N1419ET
Internal LK installed - all outputs grounded
bias +100V leakage current +12.2uA - attachments 15-19
+ bias - core aida04, braid aida12, LK1 ( HV local ground ) *not* fitted aida12 & fitted aida03, aida11 |
Sat Jul 22 08:17:48 2023, TD, Saturday 22 July 26x
|
09.20 CAEN N1419ET
Floating outputs
Channel #3 + polarity, Channels #0-2 - polarity
Channel #3 - HV cable #1
+ bias - core aida04, braid aida12, LK1 ( HV local ground ) fitted aida12, aida03, aida11
bias bonds aida01 and aida09 probably broken
aida03 LK3 ( DSSSD PCB ground ) fitted
AIDA Half rev A adaptor PCBs aida06 & aida08 - not connected to ribbon cable/test/HV
DSSSD #1 - adaptor PCB ribbon cable drain wires connected to respective adaptor PCB ground
DSSSD #2 ( not installed ) adaptor PCB ribbon cable and ribbon cable drain wires floating
AIDA Half rev B adaptor PCBs DSSSD#1 - FEE64 cooling plate - adaptor PCB ground *not* connected
AIDA Half rev A adaptor PCBs aida06 & aida08 - not connected to ribbon cable/test/HV - FEE64 cooling plate - adaptor PCB ground fitted
ground to AIDA support frame *not* connected
test + / test - *not* connected
DSSSD#1 3208-3/-21/-22
bias +120V leakage current +17.13uA - attachments 1-14
per FEE64 1.8.W spectra - 200us FSR - attachments 1-2
per FEE64 1.8.W spectra - 20us FSR - attachments 3-4
bias +100V leakage current +8.35uA - attachments 15-17
per FEE64 1.8.W spectra - 200us FSR
bias +0V leakage current +0uA - attachments 18-20
per FEE64 1.8.W spectra - 200us FSR
14.25 bias +100V leakage current +10.83uA - attachments 21-22
per FEE64 1.8.W spectra - 200us FSR
CAEN channel #3 cable moved from cable tray to floor
14.50 bias +100V leakage current +11.15uA - attachments 23-24
per FEE64 1.8.W spectra - 200us FSR
CAEN N1419ET moved to Weiner NIM bin LHS 19" rack channel #3 cable across floor to AIDA stand
HV cables channels #0-2 disconnected |
Sun Jul 16 14:20:31 2023, TD, Sunday 16 July contd. 27x
|
15.20 All ERNI pins of aida01 adaptor PCB OK => FEE64 #1 ASIC #2 channel #5 issue faulty test C? faulty ASIC channel?
Fitted drain wire from aida06 & aida08 adaptor PCBs to FEE64 cooling plates
n+n FEE64 1.8.W spectra 20us FSR - attachments 1-2
p+n FEE64 1.8.W spectra 20us FSR - attachments 3
p+n FEE64 1.8.L spectra - attachment 4
aida01 1.8.L pulser peak width 15 ch FWHM
n+n FEE64 1.8.L spectra - attachment 5
double peak spectra
Significant improvement in noise for aida06 & aida08 but still not as good as aida02 & aida04. Some additional extrinsic noise observed for aida02 & aida04.
No change in 1.8.L spectra
n+n FEE64 1.8.W spectra aida02 200us FSR, other FEE64s 20us FSR - attachments 6
baseline sinusoid observed - 4T = 320 samples = 64us = 15.6kHz
15:50 BNC PB-5
switch polarity + to -
switch BNC cables from BNC PB-5 and EG&G Ortec 534 outputs for test +/-
Attachments 7-8
baseline sinusoid observed for p+n *not* n+n FEE64 1.8.W spectra
suggests issue is EG&G Ortec 534
Restore original cabling
16.55 Swap aida09 HDMI cable from MACB #4 port 1 to MACB #5 port 1 - power cycle and restart - no change - aida09 clock not locked
Replace aida09 HDMI with *new* HDMI cable to MACB # 4 port 1 - power cycle and restart - aida09 clock locked
FEE64 temperatures OK - attachment 9
System wide checks - attachments 10-15
OK *except* cannot calibrate aida12 ADCs
per FEE64 rate spectra - attachment 16
p+n FEE64 1.8.L spectra - attachments 17
aida01 1.8.L pulser peak width 15 ch FWHM
n+n FEE64 1.8.L spectra - attachments 18
double peak spectra
p+n FEE64 1.8.W spectra 20us FSR - attachments 19-20
n+n FEE64 1.8.W spectra 20us FSR - attachments 21-22
17.10 n+n FEE64 1.8.W spectra 200us FSR
BNC PB-5 decay time 50us - attachment 23
BNC PB-5 decay time 1ms - attachment 24
18.05 ADC data item stats
slow comparator 0x64 -> 0xa
BNC PB-5 pulser frequency 100Hz so expect rate of ADC data items per FEE64 to be c. 6.4kHz
attachment 25 - aida06 & aida08 ground from FEE64 cooling plate to adaptor PCB fitted, test - connected to aida02, aida04, aida06 & aida08
attachment 26 - aida06 & aida08 ground from FEE64 cooling plate to adaptor PCB fitted, test - disconnected from aida02, aida04, aida06 & aida08
attachment 27 - aida06 & aida08 ground from FEE64 cooling plate to adaptor PCB not fitted, test - disconnected from aida02, aida04, aida06 & aida08
Rev A adaptors require grounding (as expected). Output of EG&G Ortec 534 produces c. 15kHz sinsusoid at test input - cable length/capacitative load?
|
Sun Jul 16 09:36:40 2023, TD, 15-16 July 2023 40x
|
Saturday 15 July
Cooling water ON - temperature c. +19 deg C ( controls adjacent to S4 entrance )
Flow taps ON ( S4 )
Cannot see float in mechanical flow gauge - sediment?
USB-controlled ac mains relay flow interlock ON.
Flow vibration can be felt in cooling manifold and lines.
13x FEE64s installed - see attachment 2 ( courtesy NH )
FEE64 # Cable set #
1 1
2 2
3 3
4 4
5
6 6
7
8 8
9 9
10 5
11 11
12 7
15
10x FEE64s configured - update /MIDAS/config/TclHttpd/aidas-gsi@8015/startup.tcl - see attachment 1
ttyUSB1 aida01
ttyUSB3 aida12
ttyUSB4 aida02
ttyUSB6 aida03
ttyUSB7 aida04
ttyUSB9 aida11
ttyUSB10 aida09
ttyUSB12 aida10
ttyUSB13 aida08
ttyUSB15 aida06
Update /etc/dhcp/dhcpd.conf - correct MAC address aida09
from
host aida09 {
hardware ethernet d8:80:39:41:ee:01;
fixed-address 192.168.11.9;
option root-path "/home/Embedded/XilinxLinux/ppc_4xx/rfs/aida09";
}
to
host aida09 {
hardware ethernet d8:80:39:41:ee:10;
fixed-address 192.168.11.9;
option root-path "/home/Embedded/XilinxLinux/ppc_4xx/rfs/aida09";
}
5x MACBs installed - see attachment 3
Note configuration setting 0x0 for all 5x MACBs ( cf. 0x3 per https://elog.ph.ed.ac.uk/DESPEC/517 )
17.30 System wide checks - see attachments 4-7
OK *except* aida09 clock and WR decoder errors
FEE64 temperatures OK - see attachment 8
Sunday 16 July
11.30 Restart
FEE64 temperatures OK - attachment 9
System wide checks - attachments 10-15
aida09 clock errors - no WR timestamp
aida09 WR status 0xd - attachments 16-18
Local controls aida01 cf. aida09 - attachments 19-20
status register 0xf cf. 0x4
BuTIS interface control 0x3 cf. 0x0
14.00 ASIC settings 2021Apr29-13-16-00
slow comparator 0x64
FEE64s 1, 3, 9, 10, 11, 12 + input polarity
FEE64s 2, 4, 6, 8 - input polarity
BNC PB-5 pulser
amplitude 1.0V
attenuation x1
tail pulse
tau_d 1ms
frequency 100Hz
polarity +
EG&G Ortec 534 Sum & Invert Amplifier
to provide - polarity test inputs
Test + and - signals daisy-chained to FEE64s - end of daisy-chain terminated by 50 Ohms.
Adaptor PCB
AIDA Half Rev B 180623 fitted FEE64s 1, 2, 3, 4, 9, 10, 11, 12
*all* LKs fitted
AIDA Half Rev A 120418 fitted FEE64s 6, 8
*no* LKs fitted
No drain wire connections from adaptor PCB to FEE64 cooling plate fitted
per FEE64 rate spectra - attachment 21
p+n FEE64 1.8.L spectra - attachments 22-23
aida01 1.8.L pulser peak width 15 ch FWHM
n+n FEE64 1.8.L spectra - attachments 24-25
double peak spectra
p+n FEE64 1.8.W spectra 20us FSR - attachments 26-28
n+n FEE64 1.8.W spectra 20us FSR - attachments 29-31
Observe significantly higher noise for rev A adaptors
No data observed for aida09
aida01 2.5.* data missing
FEE64 statistics aida01, aida09, good events, ADC data, pause, resume, disc, correlation & WR 48-63 - attachments 32-40 |
Fri Jul 7 11:59:06 2023, TD, Test of AIDA FEE64 - summary 11x
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Test of AIDA FEE64s
ISOL test station STFC DL, T9
Pulser BNC PB-5
Amplitude 1.0V
Attenuation x1
Polarity +
Frequency 100Hz
Tail pulse, decay time 1ms
Delay 250ns (min)
ASIC settings 2019May22-10.19.28
Slow comparator 0x80
Adaptor PCB - PJCS
FEE64 temperatures OK
System wide checks OK
Statistics OK
Hit/HitRate spectra OK
LEC spectra OK
Data observed for all channels of all ASIC #1-4
Pulser peak widths *.8.L
Wave spectra OK
Data observed for all channels of all ASIC #1-4
Date/time FEE64 MAC Pulser peak width Status
(channels FWHM)
6.7.23 17:50 d8:80:39:41:d8:2a 17,17,16,15 OK
6.7.23 11:20 d8:80:39:41:b4:0b 7,7,7,7 OK
6.7.23 10:03 d8:80:39:41:d0:0e 12,12,12,12 OK
5.7.23 15.31 d8:80:39:41:d7:cc 6,6,6,6 OK
5.7.23 14:04 d8:80:39:41:a0:71 12,11,11,12 OK Rate/Hitrate, *.*.L and *.*.W spectra - attachments 1-10
5.7.23 13:18 d8:80:39:42:0d:16 13,15,14,14 OK
5.7.23 12:43 d8:80:39:41:ee:71 17,17,15,16 OK
6.7.23 11:00 d8:80:39:42:0d:0b 17,15,16,15 https://elog.ph.ed.ac.uk/AIDA/870 Mezzanine replaced - ASIC #2 address bit #2 always on? ASIC #2 fail or mezzanine-FEE64
connection
issue?
7.7.23 09:46 d8:80:39:41:f6:ee https://elog.ph.ed.ac.uk/AIDA/869 HDMI replaced - not fully assembled - LEC fast comparator ASIC #1 channel #2 missing. ADC
does not
calibrate. HDMI issue?
OK FEE64s - attachment 11 |
Fri Jul 7 10:52:34 2023, TD, PJCS, Test of AIDA FEE64 d8:80:39:42:0d:0b ( aida03 ) - ASIC mezzanine replaced 16x
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Test of AIDA FEE64 d8:80:39:42:0d:0b ( aida03 ) - ASIC mezzanine replaced
ISOL test station STFC DL, T9
Pulser BNC PB-5
Amplitude 1.0V
Attenuation x1
Polarity +
Frequency 100Hz
Tail pulse, decay time 1ms
Delay 250ns (min)
ASIC settings 2019May22-10.19.28
Slow comparator 0x80
Adaptor PCB - PJCS
FEE64 temperatures OK - attachments 1
System wide checks OK - attachments 2-5
Statistics OK - attachments 6-7
Hit/HitRate spectra OK - attachment 8
LEC spectra - attachments 9-12
Data observed for all channels of ASIC #1, 3, & 4
Data observed (double peaks) ASIC#2 channels 4-7 & 12-15, no data observed channels 0-3 & 8-11 - ASIC#2 address bit #2 set always ON? ASIC #2 fail or Mezzanine-FEE64
connection issue?
Typical pulser peak widths 15-17 channels FWHM ASIC #1-4
Wave spectra OK - attachments 13-16
19/7/23 removed mezzanine and cleaned contacts with ipa. cleaned FEE contacts. reassembled mezzanine to FEE and tested. ASIC 2 now ok. |
Fri Jul 7 10:15:09 2023, TD, Test of AIDA FEE64 d8:80:39:41:f6:ee ( aida01 ) - HDMI connector replaced 17x
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Test of AIDA FEE64 d8:80:39:41:f6:ee ( aida01 ) - HDMI connector replaced. Cooling plate fitted - no base plate.
ISOL test station STFC DL, T9
Pulser BNC PB-5
Amplitude 0.5V
Attenuation x1
Polarity +
Frequency 100Hz
Tail pulse, decay time 1ms
Delay 250ns (min)
ASIC settings 2019May22-10.19.28 - attachment 1
Slow comparator 0x80
Options - attachment 2
Adaptor PCB - PJCS
FEE64 temperatures OK - attachments 3
System wide checks - attachments 4-9
FEE64 module aida01 global clocks failed, 6
Clock status test result: Passed 3, Failed 1
FEE64 module aida01 failed
Calibration test result: Passed 3, Failed 1
Timestamp RAM values OK?
Statistics OK - attachments 10-11
Good WAVE events reported?
LEC spectra - attachments 12-15
Data observed for all channels of all ASICs - double peaking observed - may be due to incomplete FEE64 assembly? See attachment 17
Hit/HitRate spectra - attachment 16
OK *except*
1.2.L fast comparator missing
no WAVE data |
Thu Jul 6 10:20:25 2023, TD, Unable to start Rly16 server
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Unable to start Rly16 server - see attachment 1
Added 16.10 6 July 2023
CU No /dev/ttyUSB* on Raspberry Pi
Re-seated USB cable at Raspberry Pi and USB-controlled ac mains relay, power cycled Raspberry Pi - return to normal operation. |
Wed Apr 12 12:32:13 2023, PJCS, ASIC power short problem 
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I have taken videos with an Infrared camera of the power being supplied to one isolated ASIC on a mezzanine.
The power supply is a bench supply with current limit set to 3A.
The centre of the ASIC glowed white hot for a short time and then the whole ASIC shows as hot. Ths the short is on the ASIC and not the bond wires IMO.
I am unable to globally publish the videos at present as I only have a private google drive account.
Please contact Tom Davinson for further details. |
Wed Mar 1 16:42:06 2023, Further results from Mezzanine bench tests, PJCS 
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Carried out some further work on failed mezzanine modules.
Inspected them externally and removed the copper block, internally with a bench microscope.
Found two obvious faults ..... broken components with scrambled pcb tracks.
To help determine problems with loading control registers I've added a new menu item in the ASIC control window to allow all four ASIC return values to be checked. This is only useful at the mezzanine test system.
Tested 7 that were labelled as faulty. Failed all of them. 2 with broken components and 1 with some broken bond wires.
Tested one fresh from the cupboard. It failed with over current on the +5v psu ( > 4A! ).
I propose to create a method of testing these mezzanines which allows better access to the power supply regulators ( LT3080 ) and the associated control voltage.
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