ID |
Date |
Author |
Subject |
454
|
Sat May 14 21:34:11 2022 |
BA, AA | Saturday 14 May | FEE64 module aida09 global clocks failed, 6
Clock status test result: Passed 13, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
FEE64 module aida02 failed
FEE64 module aida06 failed
FEE64 module aida09 failed
FEE64 module aida10 failed
FEE64 module aida13 failed
Calibration test result: Passed 9, Failed 5
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module
White Rabbit error counter test result: Passed 14, Failed 0
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
FPGA Timestamp error counter test result: Passed 14, Failed 0
If any of these counts are reported as in error
The ASIC readout system has detected a timeslip.
That is the timestamp read from the time FIFO is not younger than the last |
453
|
Sat May 14 19:39:13 2022 |
BA, AA | Saturday 14 May | FEE64 module aida09 global clocks failed, 6
Clock status test result: Passed 13, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
FEE64 module aida02 failed
FEE64 module aida06 failed
FEE64 module aida09 failed
FEE64 module aida10 failed
FEE64 module aida13 failed
Calibration test result: Passed 9, Failed 5
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module
White Rabbit error counter test result: Passed 14, Failed 0
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
FPGA Timestamp error counter test result: Passed 14, Failed 0
If any of these counts are reported as in error
The ASIC readout system has detected a timeslip.
That is the timestamp read from the time FIFO is not younger than the last |
452
|
Sat May 14 17:34:40 2022 |
BA, AA | Saturday 14 May | FEE64 module aida09 global clocks failed, 6
Clock status test result: Passed 13, Failed 1
Understand status as follows
Status bit 3 : firmware PLL that creates clocks from external clock not locked
Status bit 2 : always logic '1'
Status bit 1 : LMK3200(2) PLL and clock distribution chip not locked to external clock
Status bit 0 : LMK3200(1) PLL and clock distribution chip not locked to external clock
If all these bits are not set then the operation of the firmware is unreliable
FEE64 module aida02 failed
FEE64 module aida06 failed
FEE64 module aida09 failed
FEE64 module aida10 failed
FEE64 module aida13 failed
Calibration test result: Passed 9, Failed 5
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module
White Rabbit error counter test result: Passed 14, Failed 0
Understand the status reports as follows:-
Status bit 3 : White Rabbit decoder detected an error in the received data
Status bit 2 : Firmware registered WR error, no reload of Timestamp
Status bit 0 : White Rabbit decoder reports uncertain of Timestamp information from WR
FPGA Timestamp error counter test result: Passed 14, Failed 0
If any of these counts are reported as in error
The ASIC readout system has detected a timeslip.
That is the timestamp read from the time FIFO is not younger than the last
|
451
|
Sat May 14 15:35:24 2022 |
BA, AA | Saturday 14 May | |
450
|
Sat May 14 13:01:58 2022 |
MS, OH | Saturday 14 May | 14:00 |
449
|
Sat May 14 10:59:52 2022 |
MS, OH | Saturday 14 May | 12:00 |
448
|
Sat May 14 09:00:21 2022 |
MS, OH | Saturday 14 May | 10:00 |
447
|
Sat May 14 06:57:21 2022 |
MS, OH | Saturday 14 May | 08:00 Took over the shift from Philippos
In system wide checks aida09 fails ASIC clock check but it is bit 6 which is ok |
446
|
Sat May 14 03:14:00 2022 |
PP | Shift Checks | 4:13
AIDA stats OK
Leakage current OK
Temperatures OK
grafana OK
ucesb rates OK
System wide check done and same results as earlier: aida09 fails clock (1), aida02 06 09 10 13 fail ADC calibration, all pass WR
Screenshot 1: statistics
Screenshot 2: temperatures
Screenshot 3: scalers
Screenshot 4: Bias and leakage current
6:36
AIDA stats OK
Leakage current OK
Temperatures OK
grafana OK
ucesb rates OK
System wide check done and same results as earlier: aida09 fails clock (1), aida02 06 09 10 13 fail ADC calibration, all pass WR
Screenshot 5: statistics
Screenshot 6: temperatures
Screenshot 7: scalers
Screenshot 8: Bias and leakage current
|
445
|
Sat May 14 01:52:03 2022 |
ML | 2h-Shift Checks | AIDA stats ok
Leakage current ok
Temperatires ok
grafana ok
ucesb rates dropped a bit in all scalers so beam intensity must have dropped a bit.
System wide check done and same results as earlier:
aida09 fails clock (1), aida02 06 09 10 13 fail ADC calibration, all pass WR |
444
|
Fri May 13 23:37:59 2022 |
ML | 2h-Shift Checks |
Took over remotely from CB about an hour ago
At 0h40 (CET):
Stats still ok - attach 1
Leakage still OK - Attach 2
Temps - attach 3
Grafana OK
UCESB rates ok - attach 5
System-wide checks: aida09 fails clock (1), aida02 06 09 10 13 fail ADC calibration, all pass WR |
443
|
Fri May 13 15:00:23 2022 |
CB | 13 March - 16:00-24:00 shift | 16:00 Took over remotely from OH, TD who remain in GSI
Stats OK - attach 1
Stats & Leakage OK - attach 2
Temps OK
Grafana OK - attach 3
System-wide checks: aida09 fails clock (1), aida02 06 09 10 13 fail ADC calibration, all pass WR
17:29 All good, but no beam.
17:30 Beam is back
17:58 No beam again
18:10 Beam is back. Stats OK.
Ucesb OK - attach 4
Stats & Leakage currents ok - attach 5
Temps OK - attach 6
Grafana OK - attach 7
System-wide checks as before.
19:36 No beam again.
20:37 Beam is back
Stats OK - attach 8
Leakage OK
Temps OK
Grafana OK - attach 9
Ucesb OK - attach 10
System-wide checks as before
21:10 Lost anydesk connection to DAQ. Local shifters report AIDA still transferring data.
21:15 Local shifters report anydesk connection window still open. Unclear why DAQ reported offline in anydesk.
21:20 Connection restored itself. Hopefully it was a one-off.
22:51 Stats & Leakage current OK - attach 11
Temps OK
Grafana OK - attach 12
Ucesb OK - attach 13
System-wide checks as before |
442
|
Fri May 13 07:36:18 2022 |
OH, TD | Friday 13 May | 08:36 DAQ Still running smoothly
Currently on run R1_328
At current data rates we have just over 4 days of space left on the current disk
Analysis of R1_327 - attachment 1
14.15 all histograms zero'd
baseline system wide checks counters
DAQ continues file S450/R4_33
netint pushenable 6 - was 60 - to investigate FEE64 throughput issues
netint flushenable 60 - not changed
ASIC settings
slow comparator aida02 aida04 0x16, aida06 aida08 0x23, aida12 0xd, all others 0xc
BNC PB-5 settings
amplitude 1.000V
attenuation x1
frequency 2Hz
tau_d 1ms (tail pulse)
+ polarity
Attachments 2 & 3 - ucesb
Pb beam intensity c. 4e+8/spill - lower than expected 1e+9/spill . Low implant rates (~Hz/spill) are expected for setting.
Attachment 4 & 5 - grafana DSSSD bias, leakage current & temp - OK
Attachments 6-8 - NewMerger stats blocks 0, 1, & 6
Attachment 9 - NewMerger link stats
Attachments 10-11 - TapeServer/NewMerger
Attachment 12 - iptraf aida-gsi network interfaces
Attachments 13-14 - per FEE64 1.8.L spectra
pulser peak width aida01 123 ch FWHM, aida04 430 ch FWHM
Attachments 15-18 - per FEE64 rates and stat spectra
Attachments 19-22 - system wide checks
aida09 clock status 6, WR decoder status errors
Attachments 23-26 - adc, pause, resume correlation sclaer data item stats
Attachment 27 - FEE64 temps OK
Attachment 28 - DSSSSD bias and leakage currents OK
14.30 check ASIC load
14.47 attachment 29 - analysis S450/R4_38
15.11 Attachments 30-35 - data push, flush stats for all FEE64s and aida01 (low ADC data item rate) and aida06 (high ADC data item rate) |
441
|
Fri May 13 06:56:14 2022 |
OH, BA, MA | Low Rates |
Quote: |
The rate is very low in all aida, not sure .
|
This was because the statistics page had been changed to transfer buffers. The rates were ok |
440
|
Fri May 13 06:47:33 2022 |
ML | 2h-Shift Checks | It has been a quiet night. AIDA has been stable.
Stats appears stable appear
Temperature also stable
Leakage current slowly dropping still.
System wide checks done. Status quo here again. |
439
|
Fri May 13 04:45:23 2022 |
ML | 2h-Shift Checks | AIDA is running ok. Note that, in the last hour or so, the rate of implant in DSSD1 is back to higher rate ~10 Hzto 15 Hz as at the beginning of this shift.
Stats seems ok
Temperatures stable
Leakage current: ok
A systwm wide check gives same result as for the fist check on this shift at ~1am |
438
|
Fri May 13 02:56:36 2022 |
ML | 2h-Shift Checks | All seemnormal on AIDA side.
Stats as before
Temperatures stable
HV-LV ok
System wide check : all results as in the previous checks |
437
|
Fri May 13 02:28:36 2022 |
ML | beam dropped | We see less counts in AIDA implant DSSD1 (~1Hz) than at the beginning of the night shift (~10Hz).
This seems to be beam related as the count rates in DESPEC & FRS Scalers seems to have dropped too. |
436
|
Fri May 13 00:50:16 2022 |
ML | 2h-Shift Checks | All seems ok (apart for my virgin network connection usually quite reliable but not so tonight !?!).
Statistics seems ok.
Temperatures appears stable
Leakage current ok.
System Wide Checks:
Clock check: Passed= 14: - Failed=: 0
ADC calibration check:
FEE64 module aida01 failed
FEE64 module aida04 failed
FEE64 module aida06 failed
FEE64 module aida13 failed
Calibration test result: Passed=10 ; Failed= 4
If any modules fail calibration , check the clock status and open the FADC Align and Control browser page to rerun calibration for that module -> DID THAT BUT NO CHANGES
White rabbit decode status: Passed=14 ; Failed=0
FPGA timestamp check: Passed=14 ; Failed=0
Memory information: Page loading failed with the error message below:
Got the error Server Internal Error
while trying to obtain /AIDA/Check/Check.tml.
could not read "/Embedded/XilinxLinux/ppc_4xx/rfs/aida01/tmp/mybuddy.txt": no such file or directory while executing "file size $mybuddy " (procedure "do_collect_info" line 16) invoked from within "do_collect_info " ("COLLECTINFO" arm line 1) invoked from within "switch -glob $w { RESET {set started 0} CLEAR {EmptyLog} ELOG {PrintLog} ..." (procedure "do_click" line 23) invoked from within "do_click" invoked from within "if {$started != 0} { variable JS "" variable LogFlag if {$LogFlag == 1} {InsertLog "Last Updated: [clock format [clock seconds] -form..." (file "Check.tcl" line 8) invoked from within "source Check.tcl" (in namespace eval "::Check" script line 6) invoked from within "namespace eval Check { global env source [file join $env(MIDASBASE) TclHttpd tcl Common common.tcl] source [file join $env(MIDASB..." invoked from within "subst { [Doc_Dynamic] <! [global Httpd; upvar #0 Httpd[set Httpd(currentSocket)] data; set ClientIPAddress $data(ipaddr); set MyInfo $data(self)] >..." ("uplevel" body line 1) invoked from within "uplevel #0 [list subst $script]" (procedure "SubstFile" line 12) invoked from within "SubstFile /home/npg/MIDAS_Releases/23Jan19/MIDAS_200119/TclHttpd/Html/AIDA/Check/Check.tml {}" ("uplevel" body line 1) invoked from within "uplevel 1 [list SubstFile $path $interp]" (procedure "Subst_File" line 7) invoked from within "Subst_File $template $interp" invoked from within "TemplateInstantiate $sock $path {} $suffix {} $Template(templateInterp)" (procedure "Doc_application/x-tcl-template" line 9) invoked from within "$cmd $path $suffix $sock" (procedure "Doc_Handle" line 20) invoked from within "Doc_Handle $prefix $path $suffix $sock" (procedure "DocDomain" line 44) invoked from within "DocDomain / /MIDAS/TclHttpd/Html sock8 AIDA/Check/Check.tml" ("eval" body line 1) invoked from within "eval $Url(command,$prefix) [list $sock $suffix]" |
435
|
Thu May 12 22:49:39 2022 |
BA, MA | Low Rates | The rate is very low in all aida, not sure . |
|