AIDA
GELINA
BRIKEN
nToF
CRIB
ISOLDE
CIRCE
nTOFCapture
DESPEC
DTAS
EDI_PSA
179Ta
CARME
StellarModelling
DCF
K40
DESPEC, Page 23 of 37
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ID
Date
Author
Subject
Text
300
Fri May 7 19:47:54 2021
PJCS
HowTo mitigate excessive temperature in an FEE64
After tests in the Daresbury T9 system.
Disabling the waveform ADCs in
an FEE64 which is running with the FPGA over
299
Fri May 7 13:11:22 2021
NH
Friday 7th May
14:11 - Alpha has been running most of morning
Just saw rates in tape spike to 6 MB/s...
298
Thu May 6 16:59:20 2021
TD, OH
Wednesday 6 May
18.09 NH has installed jumpers LK2-4 for
*all* adaptor PCBs
13x
297
Wed May 5 20:10:16 2021
OH
Wednesday 5 May Alpha run
21:10 After all of the works in S4 today the
noise in the system was considerably worse
It was decided that before starting
12x
296
Wed May 5 16:57:48 2021
TD
Tuesday 5 May
17.55 Grafana DSSSD bias & leakage current
- attachment 1
295
Tue May 4 21:26:43 2021
OH
Alpha run
22:26 Tape server set up to write to directory
May21
DAQ stopped
10x
293
Tue May 4 14:26:50 2021
NH
FEE64 Adapter wiring diagram and layout
A figure showing the FEE64 numbers (a previous
diagram had 2/6 and 4/8 on the wrong side
of the DSSD) and the wiring of pulser/HV
292
Tue May 4 14:05:48 2021
NH
MACB Cables
During the installation of the 4 new HDMI
cables for aidas13-16 the HDMI cables between
the MACB Root and the MACB leaves were looped
291
Tue May 4 13:53:22 2021
OH, TD
Tuesday 4 May
NH has re-checked alignment of AIDA adaptor
PCBs cf. Elog:290
7x
290
Tue May 4 12:11:39 2021
OH TD
Bias test of triple
13:11 System wide checks all ok except *aida02
fails ADC calibration*
Collecting the file size of each FEE64 Options
289
Sat May 1 08:45:19 2021
TD
AIDA 24cm x 8cm DSSSD + triPlast assembly for S496
Photos provided by Nic Hubbard and Helena
Albers from the assembly of 2x triPlast
12x
288
Fri Apr 30 08:38:12 2021
TD
Friday 30 April
09.40 All system wide checks OK *except*
FEE64 module aida07 failed
6x
287
Thu Apr 29 16:56:42 2021
OH
Config changes for 16FEE
New set of ASIC settings produced 2021Apr29-13-16-00
- Note no longer odd/even for polarity of
signal
286
Wed Apr 28 17:39:35 2021
TD
Preparations for setup of aida13-aida16
Updated /etc/dhcpd.conf
285
Wed Apr 28 10:06:11 2021
NH
Wednesday 28 April
11.05 All system wide checks OK *except*
WR
284
Tue Apr 27 08:26:01 2021
TD
Tuesday 27 April - aida09 system console reports 'received undefined information code: 1' and 'code: 9'
09.25 All system wide checks OK *except*
6x
283
Mon Apr 26 09:41:21 2021
TD
Monday 26 April
10.42 All system wide checks OK *except*
Base Current Difference
282
Sun Apr 25 10:22:16 2021
TD
Sunday 25 April
11.25 All system wide checks OK *except*
Base Current Difference
9x
281
Sat Apr 24 15:48:38 2021
TD
aida12 crash - 08:33:03 Monday 19 April
from ttyUSB5 system console log
280
Sat Apr 24 15:28:17 2021
TD
aida05 crash - 11:08:07 Tuesday 20 April
From ttyUSB7 system console log
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