 Thu Nov 20 14:05:21 2014, Tom Davinson, AIDA Tests at STFC DL - PCS, TD 20x
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Configuration per Elog entries:
https://elog.ph.ed.ac.uk/AIDA/3
https://elog.ph.ed.ac.uk/AIDA/4
- except -
FEE firmware
- reverted release 0xa4ed006
as used at RIKEN due to stability/data issues with most recent releases
Detector bias CAEN N1419 Programmable HV Power Supply
- FAGND isolated from AGND (AGND = NIM chassis ground)
- floating HV supply, <5mV pp noise specification
- configured + polarity, i.e. core to nnaida11 & nnaida12 MSL type BB18 n+n ohmic strips
braid to nnaida12 & nnaida13 MSL type BB18 p+n junction strips
- configured bias voltage to 200V, max bias voltage 200V, max leakage current 20uA,
trip 10s, ramp up/down 1V/s
- bias 200V, leakage current 4.9-5.1uA
ASIC parameters
Default ASIC parameters (EXPERIMENT/AIDA/2014Aug13-13.44.58) except
- shaping time 5us
- slow comparator 20 (hex 14)
R31
- 207Bi source (serial AD6201) mounted c. 3cm from MSL type BB18 DSSSD
- p+n junction side faces 207Bi source
- source serial number *away* from DSSSD
- Pulser BNC PB-5
fall time 1ms
rate 10Hz
delay 250ns
ampl 1.00000V
polarity -
pulse top tail
atten x1
positive polarity test input via EG&G Ortec 433A
R32
- 207Bi source (serial AD6201) mounted c. 3cm from MSL type BB18 DSSSD
- p+n junction side faces 207Bi source
- source serial number faces DSSSD
Attachments 1-20 from R32 |
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Thu Sep 11 10:16:57 2014, Tom Davinson, AIDA Tests at STFC DL - PCS, SLT, TD 19x
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MSL type BB18-1000 2998-22 bias +200V I_L +3.27uA
BNC PB-5
amp 2.0V
atten x1
tau_d 1ms
freq 200Hz
pol - (output split via EG&G Ortec 433A to generate + polarity too)
PSU
TTi QL355TP "-6V & +7V" output set @ -7V & +8V, @ FEE64 -6.7V & +7.3V
TTi QPX1200S "5V" output set @ +6.2V, @ FEE64 +5.3V
'linearly regulated output' PSUs connected via standard FEE64 PSU chassis
Adaptor
nnaida11 & nnaida12 - polarity input (n+n ohmic strips)
MSL type BB18 adaptor PCB rev 180713 LK 3 & 7
nnaida13 & nnaida14 + polarity input (p+n junction strips)
MSL type BB18 adaptor PCB rev 180713 LK 1, 3, 5 & 7
FEE64
Note nnaida11 has been modified to remove the 470 Ohm resistors
linking the buffered preamp outputs from the ASICs to the buffer
amplifiers at the sampling ADC inputs. This effectively reduces
to zero the switching current load on the buffered preamp outputs.
ASIC parameters
standard *except* nnaida11 & nnaida12 preAmp reference 0x20 -> 0x90
which will reduce linear output range by c. x2 but significantly stabilises
negative polarity input ASICs
varying nnaida11 & nnaida12 'Ibias Preamp SF' and 'Ibias Preamp' from 0x8 -> 0x0
had marginal effect on stability and degraded ADC spectra
Typical pulser peak widths for nnaida11, 12 (ASICs #1-3) and nnaida13, 14 (ASICs #1-4)
c. 130-150ch FWHM.
Attachments
1-4 nnaida11, 12, 13, & 14 ASIC parameters
5-8 nnaida11, 12, 13, & 14 hit/rate patterns
9-12 nnaida11 ASICs # 1-4
13-16 nnaida12 ASICs # 1-4
17 nnaida13 ASIC # 4
18 nnaida14 ASIC # 4
19 nnaida11, 12, 13 & 14 'good events' statistics |
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Thu Sep 11 16:12:06 2014, Tom Davinson and photos by Patrick, AIDA Tests at STFC DL - PCS, SLT, TD 19x
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Changes from configuration described by Elog entry https://elog.ph.ed.ac.uk/AIDA/3
are as follows:
HV
Emco Q05-5 ISOLATED, PROPORTIONAL DC TO HV DC CONVERTER
Input TTi QL355T set +1.5V, Emco Q05-5 output +194.6V
Output RC filter 1uF x 1MOhm
i.e. a filtered, floating high voltage detector bias supply
cf. NIM-bin grounded Silena 7710 Quad Bias used previously
ASIC Adaptor PCB
nnaida11 & nnaida12 LK 3 & 7
nnaida13 & nnaida13 LK 1, 3, 5, & 7
HV + -> nnaida11 & nnaida12
HV - -> nnaida13 & nnaida14
DSSSD grounded locally at nnaida12 & nnaida13 adaptor PCBs
by ground links LK 1 & 5 (cf. Silena 7710 Quad Bias Supply
used previously).
ASIC settings
Default ASIC settings (see attachments 1-4)
Observe stable operation of both positive and negative polarity
FEE64s using default ASIC parameters and a floating HV detector
bias supply
Attachments
1-4 nnaida11, 12, 13, & 14 ASIC settings
5-8 nnaida11, 12, 13, & 14 hit/rate patterns
9-12 nnaida11, 12, 13, & 14 ASIC # 4 ADC spectra
13 nnaida12 ASIC # 1 waveforms
14 nnaida14 ASIC # 1 waveforms
15 Emco Q-series catalogue |
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Wed Jan 28 16:12:52 2015, Tom Davinson, AIDA Tests at STFC DL - 27-28.1.15 - TD & PCS
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MSL type BB18-1000 2998-22 bias +200V I_L +3.52uA
Detector bias CAEN N1419 Programmable HV Power Supply
- FAGND isolated from AGND (AGND = NIM chassis ground)
- floating HV supply, <5mV pp noise specification
- configured + polarity, i.e. core to nnaida11 & nnaida12 MSL type BB18 n+n ohmic strips
braid to nnaida12 & nnaida13 MSL type BB18 p+n junction strips
- configured bias voltage to 200V, max bias voltage 200V, max leakage current 20uA,
trip 10s, ramp up/down 1V/s
BNC PB-5
amp 0.5V
atten x1
tau_d 1ms
freq 100Hz
pol - (output split via EG&G Ortec 433A to generate + polarity too)
PSU
Standard AIDA FEE64 PSU + new filter PCBs
Adaptor
nnaida11 & nnaida12 - polarity input (n+n ohmic strips)
MSL type BB18 adaptor PCB rev 180713 LK 3 & 7
nnaida13 & nnaida14 + polarity input (p+n junction strips)
MSL type BB18 adaptor PCB rev 290114 LK 1, 3, 5 & 7
+/- test inputs terminated by 50 Ohm
DSSSD grounded locally at nnaida12 & nnaida13 adaptor PCBs
by ground links LK 1 & 5
Adaptor PCB grounds connected by thick copper braid (see attached images)
FEE64
nnaida11 2b:09:ce
nnaida12 2b:09:e8
nnaida13 2b:09:07
nnaida14 2b:22:55
FEE firmware release 0x16cee018
ASIC parameters
Default ASIC parameters (EXPERIMENT/AIDA/2014Aug13-13.44.58) except
- shaping time 2us
- slow comparator 64 (hex 40)
- nnaida11 & nnaida12 preAmp reference 0x30 -> 0x38
which will reduce linear output range but significantly stabilises
negative polarity input ASICs
Typical pulser peak widths for nnaida11, 12, 13 and 14 c. 130-150ch FWHM.
Without the copper braid connecting the two adaptor PCBs the peak widths
are typically 200-250ch FWHM.
The problem observed last week (leakage current > 20uA, bias c. 3V, i.e. an
apparent 150k short) was found to be due to a fault on the n+n side FEE Adaptor
PCB rev 290114. Specifically the left hand connector was faulty. The exact
nature of the fault has not yet been determined but will be investigated.
For time being the rev 290114 PCB has been replaced by a rev 180713 PCB
with a 2-way IDC connector from the HV cable (core) to LK1. |
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Tue May 3 15:45:17 2016, TD, AIDA Temperatures Log
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AIDA temperatures (ASIC, Virtex, PSU) are recorded in the file:
/MIDAS/log/temperatures.txt |
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Fri May 22 11:14:21 2015, TD, AIDA T9 test bed - nnaida11 DAQ stall
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AIDA T9 test bed
nnaida11 DAQ stall (0 AIDA SYNCs) at DAQ GO. Merger not in use. Fixed by STOP/GO cycle.
Attachment 1 - FEE64 firmware revision |
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Wed Nov 22 14:52:43 2023, NH, AIDA Pulser Calibration
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Connect pulser to all p+n FEEs
Turn on pulser, 100 Hz (attachment 3 for settings), rates OK (attachment 1)
1 minute at 10V.. 9V.. 1V (5X atten)
Most FEEs OK (attachment 2), aida07 and aida08 weird?
FILE: PULSER21NOV23/R4
Check in S4, one pulser LEMO not in fully, reseat and try again
File R5... much better! (attachment 4) |
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Wed Aug 9 14:40:28 2023, Carole, Nic, Jeroen, AIDA HV SUPPLY & PULSER TEST
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Tests with the HV supply (CAEN N1419ET) and Pulse Generator ( BNC PB-5 ) in the detector lab on the crate behind the DEGAS detectors, carried out the 9th August 2023
Both modules were plugged
Test 1: pulse generetor on 2 Hz
- DC, 50 ohm - HV OFF - attachment 1
- DC, 50 ohm - HV OFF, Zoom on the noise - attachment 2
- DC, 50 ohm - HV 50 V, Zoom on the noise - attachment 3
Test 2: HV supply Channel 1 - CORE and 2 - BRAID, pulse generator still on
- AC 1 Mohm - HV OFF - attachment 4
- AC 1 Mohm - HV 50 V - attachment 5
No differences were observed between crate OFF, HV OFF and HV 50 V. An important periodic noise (green on the pictures) was observed and was significantly smaller when unpluging the HV module from the crate. The thickness of the baseline noise seems to be comparable to entry 882, attachment 33-35.
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Wed Aug 22 11:38:11 2018, OH, TD, AIDA GSI Setup Noise Tests 13x
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Currently seems to be a problem with the memory check in the system wide checks that produces the message shown
- attachment 1
DAQ is being run with the following options - attachment 2 and 3
The PSU Temperature readout in aida07 appears to not be working. Shows a permanent value of 160 degC - attachment 4
Water inlet and outlet feel cold so believe it is an artiface
aida07 also appears to quite often take longer to mount than the others. Often coming in 5 minutes later than them.
Only tested aida01 - aida04 for noise as we lacked the required HDMI type c cables to set up a full MACB branch
structure.
We appear to have considerable noise issues in the FEE modules with adapter boards on but no DSSD cables
connected but test input loop and pulsar connected.
The pulsar appears to be the circuit of doom for this noise. With all test input ports connected to a pulsar
chain each FEE is seeing in the region of 800k rate of good events with discriminator thresholds set to 255.
Removing the pulsar cable from the end FEE but leaving the chain in place reduces this to around 500k.
Grounding an adapter board to the copper cooling plate also further reduces this noise somewhat but still leaves
rates of around 300k.
If an adapter board is isolated from the chain so that it has nothing connected to it the rate drops to around
300-400 which is just the rate of the sync pulses.
For the following screenshots aida01 and aida02 are isolated adapter boards.
aida03 and aida04 are connected via lemo cables via the test input to other FEE modules in their chains.
Waveforms for the 4 FEEs - attachment 5-8
Full statistics for the 4 FEEs - attachment 9-12
Good events comparison - attachment 13
It appears we need to provide a low resistance path between the FEE cooling plates like we do in RIKEN.
Currently the measured resistance between FEE 6 and 10 is around 2 ohm.
Also we may need to isolate the pulsar signals themselves
A potential difference of 5mV was also measured between the chassis of the NIM modules and the cooling plates.
Resistance was 0ohm when the power was on. |
 Wed Aug 22 13:50:30 2018, OH, TD, Reply by PCS, AIDA GSI Setup Noise Tests
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> Currently seems to be a problem with the memory check in the system wide checks that produces the message shown
> - attachment 1
>
> DAQ is being run with the following options - attachment 2 and 3
>
> The PSU Temperature readout in aida07 appears to not be working. Shows a permanent value of 160 degC - attachment 4
> Water inlet and outlet feel cold so believe it is an artiface
> aida07 also appears to quite often take longer to mount than the others. Often coming in 5 minutes later than them.
>
> Only tested aida01 - aida04 for noise as we lacked the required HDMI type c cables to set up a full MACB branch
> structure.
>
> We appear to have considerable noise issues in the FEE modules with adapter boards on but no DSSD cables
> connected but test input loop and pulsar connected.
> The pulsar appears to be the circuit of doom for this noise. With all test input ports connected to a pulsar
> chain each FEE is seeing in the region of 800k rate of good events with discriminator thresholds set to 255.
> Removing the pulsar cable from the end FEE but leaving the chain in place reduces this to around 500k.
>
> Grounding an adapter board to the copper cooling plate also further reduces this noise somewhat but still leaves
> rates of around 300k.
>
> If an adapter board is isolated from the chain so that it has nothing connected to it the rate drops to around
> 300-400 which is just the rate of the sync pulses.
>
> For the following screenshots aida01 and aida02 are isolated adapter boards.
> aida03 and aida04 are connected via lemo cables via the test input to other FEE modules in their chains.
> Waveforms for the 4 FEEs - attachment 5-8
> Full statistics for the 4 FEEs - attachment 9-12
> Good events comparison - attachment 13
>
> It appears we need to provide a low resistance path between the FEE cooling plates like we do in RIKEN.
> Currently the measured resistance between FEE 6 and 10 is around 2 ohm.
>
> Also we may need to isolate the pulsar signals themselves
>
> A potential difference of 5mV was also measured between the chassis of the NIM modules and the cooling plates.
> Resistance was 0ohm when the power was on.
Re:- Memory check problem..... the required log file is not at /MIDAS/XilinxLinux/...... The file is a log file placed
in the FEE64 root file system. The code will be altered in time to reflect the new location by using a local variable.
Re:- aida07. This module should be urgently removed and sent back to Daresbury for repair. This measurement could be
indicative of the worse problems with this module.
Re:- Earthing. Please could you add some photos of the installation. ( apologies if they are already here ;-) If I
recall it is worth adding a low resistance connection ( big copper braid ) from the NIM bin to the adaptor board earths. |
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Mon May 2 07:37:03 2016, TD, AIDA FEE layout
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UP
nnaida25
nnaida26
nnaida1 nnaida9 nnaida17
LEFT nnaida2 nnaida10 nnaida18 RIGHT
nnaida31 nnaida23 nnaida15 nnaida7 nnaida3 nnaida11 nnaida19 nnaida27
nnaida32 nnaida24 nnaida16 nnaida8 nnaida4 nnaida12 nnaida20 nnaida28
nnaida5 nnaida13 nnaida21
nnaida6 nnaida14 nnaida22
nnaida29
nnaida30
DOWN
<LOOKING UPSTREAM>
LEFT-RIGHT n+n ohmic strips
UP-DOWN p+n junction strips |
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Sun May 1 07:59:08 2016, CG,PV,TD, AIDA Detector Configuration
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UPSTREAM
Detector Serial Operating CAEN N1519 CAEN N1519 Bias FEE64 Bias Config
# # Bias (V) Addr # channel # Cable Core Braid
1 3058-2 +100 0 0 1 nnaida25, 27, 30 & 32 nnaida27 nnaida29 (LK5)
2 3058-3 +100 0 1 2 nnaida18, 20, 22 & 23 nnaida20 nnaida22 (LK1)
3 3058-4 +100 0 2 3 nnaida17, 19, 21 & 24 nnaida19 nnaida21 (LK5)
4 3058-5 +100 0 3 4 nnaida10, 12, 14 & 15 nnaida12 nnaida14 (LK1)
5 3058-6 +100 1 0 5 nnaida9, 11, 13 & 16 nnaida11 nnaida13 (LK5)
6 3058-7 +100 1 1 6 nnaida2, 4, 6 & 7 nnaida4 nnaida6 (LK1)
7 2977-15 +100 1 2 7 nnaida1, 3, 5 & 8 nnaida3 nnaida5 (LK5)
8 1 3 8
DOWNSTREAM
Notes
_____
MSL type BB18 PCB ground links (LK3 & LK7) not fitted
To be checked |
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Sat May 9 11:28:32 2015, TD, AIDA DSSSD dis-assembly
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| AIDA DSSSD #1-3 stack disassembled without problem. DSSSDs returned to boxes
in the BF3 AIDA storage area.
Attachments 1 & 2 show DSSSD #1 (3131-11) - spot the difference! |
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Sat Oct 29 07:26:59 2016, TD, AIDA ADC & disc data synchronisation check 14x
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Following analysis of AIDA ADC & disc readout ( see https://elog.ph.ed.ac.uk/AIDA/404 )
changed timestamp resolution from 1us/channel to 20.48us/channel
Offline sort (from disk file)
Attachments 1-3 s1-s32 # ADC data items per FEE64, s100-132 # disc data items per FEE64 (20.48us/channel)
Attachments 4-5 s1000 4 * ( module # - 1 ) + ASIC # versus timestamp (ch 0-95 ADC data, ch 100-195 disc data,
20.48us/channel)
Attachments 6-7 MIDASsort terminal session logs for *offline* sort
Online sort (from TapeServer)
Attachment 8 s1-s32 # ADC data items per FEE64, s100-132 # disc data items per FEE64 (20.48us/channel)
Attachments 9-10 s1000 4 * ( module # - 1 ) + ASIC # versus timestamp (ch 0-95 ADC data, ch 100-195 disc data,
20.48us/channel)
Attachments 11-12 MIDASsort terminal session logs for *online* sort
Attachment 13 MIDASsort FORTRAN sort routine sync.f
Attachment 14 Spectrum titles for the above sort routine
Note
1) data is discontinuous as a function of timestamp because we are sampling buffers
from the TapeServer rather than sorting all data as above
2) a low rate of timewarps is reported which appears to be an artifact of the buffer
sampling - no timewarps reported by analyses of the corresponding data files
|
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Fri Jun 10 12:51:19 2016, TD, ADC offsets - pass 1 -18.15 3 June 2016
|
Column order:
Channel = (fee# - 1)*64 + (asic# - 1)*16 + channel
FEE
ASIC
Channel
Offset (ADC channels)
Offset error (ADC channels)
INL (%)
# peaks
Spectrum name
ADC offset to be used as follows:
adc(i) = INT( ABS( raw_adc(i) - 32768 ) - offset(i) + 0.5 )
This is a first pass analysis with ~90% of the ADC offsets and something approaching ~95% achievable
(64 channels of nnaida19 not operational).
Recommend ignoring those with INL > 1%, offsets > 500 channels |
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Sun May 28 09:55:11 2017, PV, ADC offset value from pulser walkthrough run May2017/R28 R29
|
ADC offset calculation using data from pulser walkthrough runs, see:
https://elog.ph.ed.ac.uk/AIDA/603
Attachment 1,2: excel and text file with tabulated ADC offset values.
Attachment 3,4: 2D histogram pulser amplitute vs channel number (with gain matching applied) for validating the
calculation.
Note: Channel with ADC offset=0 means ADC offset could not be calculated properly due to poor resolution/low
statistic |
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Tue Feb 9 11:44:21 2021, OH, TD, CA, LS, 9th Feb GSI Dry run 16x
|
Database file - 2019Dec19-16.19.51
Current threshold at 0x64
13:27 Recovered from power cycle
System wide checks all ok - Attachments 1-6
*NB* Synchronise the ASIC clocks doesn't work - Attachment 7
ASIC Control ok
FEE temperatures ok - Attachment 8
Bias and leakage currents ok - Attachment 9
New taper service menu - Attachment 10
Pulser peaks log plot - Attachments 11-12
1.8.L pulser peaks - Attachment 13-14
Waveform plots - Attachment 15-16
FEE7 we aren't seeing a HIT pattern but we are seeing ADC data items -> It was a corrupted options file
15:20 DAQ Crashed after enabling data transfer
Problem was not configuring the tapeserver correctly
Have recovered from this. There are now no histograms for FEE09
This is because the options file has been corrupted during startup.
From the statistics it appear we are still reading data on the FEE
Chosen to let the DAQ run in this state to test stability for the time being |
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Thu Jun 8 23:57:26 2017, ZLiu, TD, 9June2017 8:00-16:00 32x
|
08:06 System wide checks all ok
implantation profile - attachment 1
count rate - attachment 2
Bias and leakage currents ok - attachment 3
DAQstatistics
08:30 BRIKEN and BigRIPS stop their DAQs
AIDA on file R7_604
08:32 BigRIPS starts run 3090
BRIKEN starts run 85
AIDA on file R7_604
08:44 BRIKEN and BigRIPS stop their DAQs
AIDA on file R7_607
08:49 BigRIPS starts run 3091
BRIKEN starts run 86
AIDA on file R7_608
09:42 BRIKEN and BigRIPS stop their DAQs
AIDA on file R7_621
*** DAQ synchronisation reset ***
see BRIKEN 2017 Elog http://ribf-exp.riken.jp/elog/BRIKEN2017-June/323
09:51 BigRIPS starts run 3093
BRIKEN starts run 87
AIDA on file R7_623
10:06 System wide checks all ok
Bias and leakage currents ok - attachment 5
count rate - attachment 6
implantation profile - attachment 7
FEE temperature - attachment 8
10.30 layout spectra - see attachments 9-18
analysis of RIBF128/R7_630 - deadtime < 0.5%, no ts timewarps, 4x MBS timewarps - see attachment 19
online analysis - ADC & disc data synchronsed - see attachment 20
10.36 all histograms and SortSas spectra zero'd
10:53 BRIKEN and BigRIPS stop their DAQs
AIDA on file R7_636
10:54
BigRIPS starts run 3094
BRIKEN starts run 88
AIDA on file R7_636
11:49 BigRIPS and BRIKEN stop their DAQ
AIDA on file R7_649
11:49 BigRIPS starts run 3095
BRIKEN starts run 89
AIDA on file R7_649
12:15 system wide checks -- OK
see attchments 21-26
12.54 DAQ stop
AIDA file RIBF128/R7_664
12.55 DAQ start
AIDA file RIBF128/R7_664
BRIKEN file 3096
BigRIPS file 90
13.55 BigRIPS team entered the beam line area to place a 1.5 mm Al degrader
DAQ stop
AIDA file on RIBF128/R7_679
BRIKEN file 3096
BigRIPS file 90
14:03 BigRIPS starts run 3097
BRIKEN starts run 91
AIDA on file R7_680
14:52 beam stopped
15:00 BRIKEN and BigRIPS stop their DAQs
AIDA on file R7_694
15:02
BigRIPS starts run 3098
BRIKEN starts run 92
AIDA on file R7_694
15:48 beam stopped
15:52 beam back
16:06 BRIKEN and BigRIPS stop their DAQs
AIDA on file R7_709
16:08
BigRIPS starts run 3099
BRIKEN starts run 93
AIDA on file R7_710
16:20 system wide checks--OK
see attachments 27-32
17:06 BRIKEN and BigRIPS stop their DAQs
AIDA on file R7_723
17:08
BigRIPS starts run 3100
BRIKEN starts run 94
AIDA on file R7_724 |
|
Wed Feb 10 10:56:02 2016, CG, TD, 9-10 February 2016 7x
|
MSL type BB18(DS)-1000 serial 2998-22
Bias +200V, I_L +=6.540uA, ambient temperature +19.9 deg C
DSSSD - AIDA adaptor PCB cabling
4 off LH Coupler (Kapton PCB, 5cm), 2x 34-way Samtec ribbon cable (45cm), RH coupler(Kapton PCB, 10cm)
+ 3M 1245 1.4mil copper foil screen ribbon cables + RH coupler only (i.e. not LH coupler)
+ drain wires -> gold-plated Lemo-00 test input connectors
nnaida 11 & 12 AIDA adaptor PCB rev B
nnaida 13 & 14 AIDA adaptor PCB rev C (LK1 fitted)
ground links LK3 & LK7 fitted to nnaida11-14 AIDA adaptor PCBs
Heavy duty copper cable connects copper front end frames of FEE modules
Nitto 5011N conductive gasket between FEE module and front end frames
Standard ASIC settings
nnaida 11 & 12 - negative input
nnaida 13 & 14 - positive input
Pulser BNC PB-5
Fall time 1.0ms
Rate 100Hz
Delay 250ns
Ampl 5.00000V
Polarity +
Pulse top Tail
Atten 10x
Clamp ON
- polarity via Cooknell SA1 Summing Amplifier
207Bi source, approx centred on DSSSD, approx 2cm from DSSSD
File R5
shaping time 0.5us
slow comparator 16 (dec)
File R6
shaping time 8us
slow comparator 16 (dec)
start: stop: 18.01
File R7
shaping time 8uS
slow comparator 12 (dec)
start: 18.02 stop: 09.29 10.2.16
spectra saved to disk 11.37 BST (sic)
10.2.16
-------
10.50 Bias +200V, I_L +=6.010uA, ambient temperature +20.0 deg C
File R8
shaping time 8uS
slow comparator 10 (dec)
start: 10.52 stop: 13.12
spectra saved to disk 14.13 BST (sic)
attachments 1 & 2 - hit patterns during R8
DAQ stalled at start of R9
Run control (updated) showed all FEEs going
No good events from nnaida12 & 14, nnaida11 & 13 OK
nnaida would not stop, would not reset
Power cycle to restart
Ignore R9
File R10
shaping time 8uS
slow comparator 10 (dec)
start: 13.27 stop: 14.09
spectra saved to disk 15.10 BST (sic)
Pulser walkthrough 9.00000V-1.00000V @ 1.0000V step
see attachment 3
File R11
shaping time 8uS
slow comparator 10 (dec)
start: 14.12 stop: 14.38
spectra saved to disk 15.39 BST (sic)
Pulser walkthrough 1.00000V-0.200000 @ 0.1000V step
See attachment 4 & 5
Ignore R12 - same issue as before R9
File R13
shaping time 8uS
slow comparator 8 (dec)
start: 14.50 stop: 15.11
Pulser amplitude 5.00000V
File R14
shaping time 8uS
slow comparator 8 (dec)
start: 15.12 stop: 15.20
Pulser amplitude 5.00000V & 0.20000V
File R15
shaping time 8uS
slow comparator 8 (dec)
start: 15.20 stop: 15.28
spectra saved to disk 16.33 BST (sic)
Pulser amplitude 0.10000V & 1.00000V
see attachments 6 & 7
For slow comaparator setting 8 (dec) and with the above BNC PB-5 pulser settings above
the slow comparator rate decreases from the expected 100Hz (plus source) to < 50Hz
between pulser amplitude 0.20000 and 0.10000V.
15.32 Bias +200V, I_L +=6.550uA, ambient temperature +19.6 deg C |
|
Thu Nov 5 16:28:05 2015, CG, TD, 5 Nov 2015 - New kapton cable tests @ DL 11x
|
New Kapton PCB design (2x 0.45m + inter-connecting PCB, no ground plane layers) under test with small system in T9.
3 cables modified to remove ground connection.
When just connected to system and BB18 2998-20, with no additional grounding or shielding of the cables
and bias of +200V (leakage current +6.2uA, ambient temp +27 deg C) to nnaida14, we observed average pulser peak widths
of ~250ch FWHM
Waveforms were just noise.
Added heavy duty copper braid between adapter PCBs, the small metal box for the detector and Cu tape and drain wire to the kapton connected to nnaida14.
This reduced the peak widths to ~160ch FWHM
Adding grounding between the adapter PCBs and the NIM bin chasis increased the peak widths.
Waveforms for nnaida11-13 remained unchanged, but expected (albeit noisy) traces could be seen for nnaida14).
------> Patrick: with ASIC1 waveforms for all nnaida turned on, we found they would occasionally stall for some. e.g. of 4 being observed, upon update, only 1 or 2 actually would. Stop-Go did not resolve this. Load/check ASIC resolved issue.
nnaida14 developed double peaking of pulser peak.
Note waveforms exhibit significantly faster risetime than previous Kapton PCB variants => lower C, as expected |
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