| ID |
Date |
Author |
Subject |
|
485
|
Sun Jun 19 19:55:20 2022 |
NH | aida03 and aida04 |
aida03 and aida04 seem to stop sending data quickly
stopping DAQ + merger and restarting got them resending data, but quickly stopped again
both are showing large WR errors that increases approx every second.
Assume HDMI cables not well seated and causing all sorts of odd behaviour |
| Attachment 1: Screenshot_2022-06-19_205528.png
|
|
| Attachment 2: Screenshot_2022-06-19_205544.png
|
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|
507
|
Tue Jun 28 09:37:19 2022 |
NH | Tues 28 June 08:00- |
Experiment over
10:37 - Stop DAQ & Tape
S4 enters controlled access and they uncable bPlas
Will dismount AIDA snout after |
|
511
|
Tue Aug 30 13:48:32 2022 |
NH | AIDA Single Switch Configuration |
The second switch was moved back to CARME so AIDA has been configured back to using a single switch
aida02/aida04/aida06/aida08 updated back to first switch as per https://elog.ph.ed.ac.uk/DESPEC/433
Additionally a ribbon cable is attached to aida01 and aida05 to introduce some noise into the system |
|
512
|
Thu Sep 8 12:31:25 2022 |
NH | Retrying AIDA DataAcq v10 |
Startup AIDA with ribbon cable connected to aida03 and aida07 for noise
Setup and run with waveforms enabled. Discriminators ADC power etc as default
Try to push above 200k as this is where we saw issues before... lowering threshold to 0x3 pushes rates to
aida03 - 320k
aida07 - 254k
Startup merger and observe rates
aida03 - 224k
aida07 - 213k
Rate drop observed as before.
Now update aidacommon to point to AidaExecV10 and powercycle FEEs
Rates again with 0x3
aida03 - 315k
aida07 - 252k
Restart with data transfer ON
aida03 - 317k
aida07 - 262k
No errors in merger terminal or "Merge time errors" statistic
Will keep running |
| Attachment 1: AnyDeskMSI_2022-09-08_13-35-50.png
|
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| Attachment 2: AnyDeskMSI_2022-09-08_13-35-58.png
|
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| Attachment 3: AnyDeskMSI_2022-09-08_13-36-02.png
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|
513
|
Thu Sep 8 12:37:18 2022 |
NH | Proxy Port Changed |
The proxy in Firefox, Yum and AnyDesk has been changed as the old wasn't working
proxy.gsi.de port 3128 is now in use |
|
515
|
Thu Oct 6 16:51:49 2022 |
NH | Oscilloscope analysis |
Investigating AIDA noise with a TA041 differential probe and oscilloscope
AC Mains (DESPEC platform AC, L-N)
Probe attentuation = 1:100
Fig 1: Main AC waveform [X: 5ms/div, Y: 100 V/div]
Fig 2: Zoomed in at peak (20 V FSR, any less and the waveform clipped) [X: 10us/div, Y: 20V/div]
Fig 3: Longer time base and FFT of 0-5 MHz. No significant frequency harmonics noticed [X: 5ms/div, Y:20 V, FFT X: 500 kHz/div, Y: 10 dBm/div]
No significant noise or distortion present, fully within any AC specification.
Note that at the moment there is almost no load on AC
Equipment on on DESPEC rack: AIDA NIM, AIDA Raspberry Pis, bPlas PC (+ WR) + 2x DESPEC NIM crates
No autofill, VME crate or detectors
All big machines at GSI (SIS, FRS) off (suspect pumps are on)
Ion catcher not on (I think under repair)
-
FEE PSU studies
Probe connected to 5V exposed power pin on FEE64 (+v) and to grounding crimp on FEE64 (-v)
No adapter board connected
Attentuation = 1:10
Fig 4: FFT when FEEs are *off* - essentially probe+scope noise [X: 5ms/div, Y: 100 mV/div, FFT: X: 500 kHz/div, Y: 10 dBm/div]
Fig 5: FFT when FEEs are *on* - notice 1.4 MHz peak in FFT, also seen on ADC waveform readout before (fig 6) [X: 5ms/div, Y: 100 mV/div, FFT: X: 500 kHz/div, Y: 10 dBm/div]
Fig 7: 500 ns/div 5V output on FEE, single FEE on the PSU [X: 500 ns/div, Y: 100 mV/div]
Note average max voltage is 5.31 V (power on) and ~ 70 mV "peak to peak" -might be from probe/scope?
Also see voltage changes with FEE power draw:
Power on : 5.45 V (different scale to above)
SETUP ran : 5.51 V
FADCs off : 5.86 V
ACQ Go: : Unchanged; ASIC threshold 0xa: Unchanged
Also check situation on a fully loaded PSU (8 fees connected and powered on)
Power on: 5.29 V (fig 8)
SETUP ran: 5.36 V (fig 9)
FADCs off: 5.64 V (fig 10)
All X: 500 ns/div, Y: 100 mV/div
Both cases observe voltage rises as current draw drops (as expected for voltage drop along a cable)
Noise on 'scope seems to get slightly worse with reduced current (and higher voltage)
No sign of strong 100 kHz noise as seen in ADC traces beforehand
Todo:
- Check -6V and 7V rails
- Check 5V and noise when front-end card is added and pulser/HV connected
- Check between two FEE64 grounds
- Check direct out of PSU vs ground to see if 1.4 MHz appears on PSU side or FEE64 side
-
11.10.22 Updates
Attachement 11 - 5V PSU on upper PSU with no FEEs attached whatsoever. No 1.4 MHz (on FFT) but clear low frequency beats from switching - presumably low/no load behaviour
Attachement 12 - 5V PSU on aida12 with 8 FEEs on PSU. Longer time base to allow lower frequencies in FFT. 1.4 MHz switching spikes visible but nothing around 100 kHz region
Attachments 13-16: 5V PSU on aida12 at 20 mV/div vertical and 1, 0.5, 2, 5 us/div horizontal respectively
12.10.22 Updates
Attachment 17: -6V PSU on aida12 with 8 FEEs on PSU. 2 us/div timebase. 20 mV/div amplitude
Attachment 18: 10 ms timebase and FFT
Average voltage: -6.21 V
Attachment 19: 7V PSU on aida12 with 8 FEEs on PSU. 2 us/div timebase. 20 mV/div amplitude
Attachment 18: 10 ms timebase and FFT
Average voltage: 7.46V
Measurement between AIDA12 ground and Reference ground/copper bar
+ve (red probe) attached to copper bar at ground point (not strong connection at present)
-ve (black probe) attached to ground crimp on aida12 (connected to cooling plate)
aida12 no adapter board connected: connections are PSU, Ethernet, HDMI and TTY only
Attachment 21: 5 us/div 100 mv/div waveform, big oscillations present. Not seen before FEEs turned on (8 FEES, 1-7+12)
Attachment 22: 10 ms/div for FFT, sharp peak at exactly 100 kHz observed...
Attachment 23: Between 5V PSU (+ve) and 19" rack (-ve) with no FEEs connected to PSU
See strong 100 kHz oscillations too, note that voltage isn't 5V as PSU is floating w.r.t. ground
Looks to be common mode noise (on both 5V and Return of PSU)
Attachment 24: Same as 21 but using thick crocodile clips on probe to ground and aida12. Noise is attenuated but still present |
| Attachment 1: SCRN0086.PNG
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| Attachment 2: SCRN0090.jpg
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| Attachment 4: SCRN0107.jpg
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| Attachment 5: SCRN0108.jpg
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| Attachment 6: Image_Pasted_at_2022-10-6_15-51.jpg
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| Attachment 23: SCRN0149.PNG
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| Attachment 24: SCRN0153.PNG
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516
|
Fri Dec 16 14:02:12 2022 |
NH | AIDA System off for christmas break |
The AIDA NIM crate, pis and workstation have been powered off for the Christmas break and will not be accessible |
|
519
|
Mon Aug 28 12:47:56 2023 |
NH | Power Failure 24.08.2023 |
There was a power failure in the morning of 24.08.2023 in the Rhein-Main area affecting GSI
The Aida workstation (aida-3) has been restarted, it is unknown if the Pis in S4 rebooted as well (there is a UPS)
29.8.23 TD Both RPi systems rebooted four days ago. |
|
520
|
Thu Aug 31 15:24:56 2023 |
NH | New AIDA MBS PC |
The AIDA MBS FDR will be x86l-119 from now on, not x86l-94
the MBS relay and startup scripts will be changed for this |
|
532
|
Sun Mar 10 17:08:12 2024 |
NH | AIDA FEE Layout + Cabling Plan for S100 |
Proposed FEE numbering and wiring plan for upcoming experiment S100 (2x Wide DSSSDs)
Image designed in draw.io, source attached
FEE numbering is as S450, minimises cable movement from S505/Narrow AIDA
But means merger is not working with 1 DSSD (until all FEEs installed)
Wiring of adapter boards as from noise tests and what should work for DSSD bias
LK3 on middle bottom adapter to ground DSSD
LK1 on one n+n adapter to ground n+n side bias
p+n has -ve voltage (w.r.t. ground) bias applied via lower adapter boards
ground loop grounds all adapter boards, except 2 p+n adapter boards which are grounded by the bias lemo shield instead
MACB layout also included, with expected NIM logic signals for the aida scalers:
1: Pulser/Sync clock (send to all subsystems, "trigger 3")0
3/4: Time Machine
5/6: SC41L/R
All other FEEs have their scaler available
(Scaler should be in left LEMO on MACB, right is output (AIDA->NIM/unused), bottom 4 are triggers from AIDA (unused)
Test circuit will not be used in experiment due to noise, but can be temporarily set up for pulser walkthrough
Revision 2 correct as of 27 March 2023 |
| Attachment 1: AIDA_S100_WiringPlan.drawio.png
|
|
| Attachment 2: AIDA_S100_WiringPlan.drawio
|
<mxfile host="app.diagrams.net" modified="2024-03-09T18:35:12.515Z" agent="Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:123.0) Gecko/20100101 Firefox/123.0" etag="cLcX_EiphkJQIDoz3Eud" version="24.0.2" type="device">
<diagram name="Page-1" id="rdp9_B-ufofv8BSNokWG">
<mxGraphModel dx="1562" dy="846" grid="1" gridSize="10" guides="1" tooltips="1" connect="1" arrows="1" fold="1" page="1" pageScale="1" pageWidth="1920" pageHeight="1200" math="0" shadow="0">
<root>
<mxCell id="0" />
<mxCell id="1" parent="0" />
<mxCell id="Lok4d1QbW70blzeSAxq8-34" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-2" target="Lok4d1QbW70blzeSAxq8-3">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-2" value="9" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="280" y="200" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-35" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-3" target="Lok4d1QbW70blzeSAxq8-4">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-3" value="1" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="440" y="200" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-4" value="10" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="600" y="200" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-42" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-5" target="Lok4d1QbW70blzeSAxq8-6">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-5" value="13" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="280" y="120" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-43" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-6" target="Lok4d1QbW70blzeSAxq8-7">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-6" value="5" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="440" y="120" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-7" value="14" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="600" y="120" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-8" value="15" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="280" y="480" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-57" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0;exitY=0.5;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-9" target="Lok4d1QbW70blzeSAxq8-8">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-9" value="7" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="440" y="480" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-40" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0.5;entryY=1;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-10" target="Lok4d1QbW70blzeSAxq8-15">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-54" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.75;exitY=1;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-10" target="Lok4d1QbW70blzeSAxq8-51">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-56" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0;exitY=0.5;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-10" target="Lok4d1QbW70blzeSAxq8-9">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-10" value="16" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="600" y="480" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-44" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-11" target="Lok4d1QbW70blzeSAxq8-12">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-11" value="11" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="280" y="400" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-47" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-12" target="Lok4d1QbW70blzeSAxq8-13">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-12" value="3" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="440" y="400" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-32" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0.5;entryY=1;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-13" target="Lok4d1QbW70blzeSAxq8-14">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-55" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.75;exitY=1;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-13" target="Lok4d1QbW70blzeSAxq8-49">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-13" value="12" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="600" y="400" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-61" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=0;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-14" target="Lok4d1QbW70blzeSAxq8-2">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-14" value="2" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="160" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-41" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=0;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-15" target="Lok4d1QbW70blzeSAxq8-5">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-15" value="6" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="80" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-37" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-16" target="Lok4d1QbW70blzeSAxq8-10">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-16" value="8" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="880" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-17" value="4" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="800" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-18" value="LK3" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="514" y="416" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-21" value="LK3" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="514" y="496" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-36" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" edge="1" parent="1" source="Lok4d1QbW70blzeSAxq8-22" target="Lok4d1QbW70blzeSAxq8-13">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-22" value="<div>LK1</div>" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="790" y="370" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-23" value="LK1" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="870" y="370" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-49" value="<div>HV CH0<br>NEGATIVE</div>" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="990" y="450" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-51" value="<div>HV CH1<br>NEGATIVE<br></div>" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="990" y="530" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-59" value="" style="shape=sumEllipse;perimeter=ellipsePerimeter;whiteSpace=wrap;html=1;backgroundOutline=1;" vertex="1" parent="1">
<mxGeometry x="484" y="305" width="30" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-60" value="Beam Into Page" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="530" y="305" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-62" value="LK1 = Bias -&gt; GND<br>LK3 = DSSD GND -&gt; GND" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" vertex="1" parent="1">
<mxGeometry x="770" y="125" width="170" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-89" value="" style="group" vertex="1" connectable="0" parent="1">
<mxGeometry x="230" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-65" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-66" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-67" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-70" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-71" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-72" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="25" y="230" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-77" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="10" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-78" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="10" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-79" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="10" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-80" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="10" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-81" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="10" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-84" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="40" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-85" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="40" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-86" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="40" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-87" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="40" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-88" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-89">
<mxGeometry x="40" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-90" value="" style="group" vertex="1" connectable="0" parent="1">
<mxGeometry x="350" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-91" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-92" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-93" value="1" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-94" value="2" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-95" value="3" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-96" value="4" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="25" y="230" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-97" value="1" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="10" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-98" value="2" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="10" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-99" value="3" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="10" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-100" value="4" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="10" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-101" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="10" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-102" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="40" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-103" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="40" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-104" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="40" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-105" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="40" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-106" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-90">
<mxGeometry x="40" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-107" value="5" style="group" vertex="1" connectable="0" parent="1">
<mxGeometry x="470" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-108" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-109" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-110" value="5" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-111" value="6" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-112" value="7" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-113" value="8" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="25" y="230" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-114" value="5" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="10" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-115" value="6" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="10" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-116" value="7" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="10" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-117" value="8" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="10" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-118" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="10" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-119" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="40" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-120" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="40" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-121" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="40" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-122" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="40" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-123" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-107">
<mxGeometry x="40" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-124" value="" style="group" vertex="1" connectable="0" parent="1">
<mxGeometry x="590" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-125" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-124">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-126" value="" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-124">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-127" value="9" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-124">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-128" value="10" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-124">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-129" value="11" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="Lok4d1QbW70blzeSAxq8-124">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
... 196 more lines ...
|
| Attachment 3: AIDA_S100_WiringPlan(1).drawio
|
<mxfile host="app.diagrams.net" modified="2024-03-27T12:12:06.799Z" agent="Mozilla/5.0 (X11; Ubuntu; Linux x86_64; rv:123.0) Gecko/20100101 Firefox/123.0" etag="0KC3XQLCIUXvtcbPW53b" version="23.1.1" type="device">
<diagram name="Page-1" id="rdp9_B-ufofv8BSNokWG">
<mxGraphModel dx="794" dy="1153" grid="1" gridSize="10" guides="1" tooltips="1" connect="1" arrows="1" fold="1" page="1" pageScale="1" pageWidth="1920" pageHeight="1200" math="0" shadow="0">
<root>
<mxCell id="0" />
<mxCell id="1" parent="0" />
<mxCell id="Lok4d1QbW70blzeSAxq8-34" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-2" target="Lok4d1QbW70blzeSAxq8-3" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-2" value="9" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="280" y="200" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-35" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-3" target="Lok4d1QbW70blzeSAxq8-4" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-3" value="1" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="440" y="200" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-4" value="5" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="600" y="200" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-42" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-5" target="Lok4d1QbW70blzeSAxq8-6" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-5" value="10" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="280" y="120" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-43" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-6" target="Lok4d1QbW70blzeSAxq8-7" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-6" value="14" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="440" y="120" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-7" value="13" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="600" y="120" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-8" value="11" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="280" y="480" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-57" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0;exitY=0.5;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;" parent="1" source="Lok4d1QbW70blzeSAxq8-9" target="Lok4d1QbW70blzeSAxq8-8" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-9" value="7" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="440" y="480" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-40" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0.5;entryY=1;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-10" target="Lok4d1QbW70blzeSAxq8-15" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-54" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.75;exitY=1;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-10" target="Lok4d1QbW70blzeSAxq8-51" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-56" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0;exitY=0.5;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;" parent="1" source="Lok4d1QbW70blzeSAxq8-10" target="Lok4d1QbW70blzeSAxq8-9" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-10" value="16" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="600" y="480" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-44" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-11" target="Lok4d1QbW70blzeSAxq8-12" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-11" value="15" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="280" y="400" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-47" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=1;exitY=0.5;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-12" target="Lok4d1QbW70blzeSAxq8-13" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-12" value="3" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="440" y="400" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-32" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=0.5;entryY=1;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-13" target="Lok4d1QbW70blzeSAxq8-14" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-55" value="BIAS" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.75;exitY=1;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#ffe6cc;strokeColor=#d79b00;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-13" target="Lok4d1QbW70blzeSAxq8-49" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-13" value="12" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="600" y="400" width="120" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-61" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=0;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-14" target="Lok4d1QbW70blzeSAxq8-2" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-14" value="2" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="160" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-41" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=0;exitDx=0;exitDy=0;entryX=0;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-15" target="Lok4d1QbW70blzeSAxq8-5" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-15" value="6" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="80" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-37" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-16" target="Lok4d1QbW70blzeSAxq8-10" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-16" value="8" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="880" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-17" value="4" style="rounded=0;whiteSpace=wrap;html=1;" parent="1" vertex="1">
<mxGeometry x="800" y="240" width="40" height="160" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-18" value="LK3" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="514" y="416" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-21" value="LK3" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="514" y="496" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-36" value="GND" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;exitX=0.5;exitY=1;exitDx=0;exitDy=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;fillColor=#d5e8d4;strokeColor=#82b366;endArrow=none;endFill=0;strokeWidth=2;" parent="1" source="Lok4d1QbW70blzeSAxq8-22" target="Lok4d1QbW70blzeSAxq8-13" edge="1">
<mxGeometry relative="1" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-22" value="<div>LK1</div>" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="790" y="370" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-23" value="LK1" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="870" y="370" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-49" value="<div>HV CH0<br>NEGATIVE</div>" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="990" y="450" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-51" value="<div>HV CH1<br>NEGATIVE<br></div>" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="990" y="530" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-59" value="" style="shape=sumEllipse;perimeter=ellipsePerimeter;whiteSpace=wrap;html=1;backgroundOutline=1;" parent="1" vertex="1">
<mxGeometry x="484" y="305" width="30" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-60" value="Beam Into Page" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="530" y="305" width="60" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-62" value="LK1 = Bias -&gt; GND<br>LK3 = DSSD PCB GND -&gt; GND" style="text;html=1;align=center;verticalAlign=middle;whiteSpace=wrap;rounded=0;" parent="1" vertex="1">
<mxGeometry x="760" y="125" width="180" height="30" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-89" value="" style="group" parent="1" vertex="1" connectable="0">
<mxGeometry x="230" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-65" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-66" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-67" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-70" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-71" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-72" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="25" y="230" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-77" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="10" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-78" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="10" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-79" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="10" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-80" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="10" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-81" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="10" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-84" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="40" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-85" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="40" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-86" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="40" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-87" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="40" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-88" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-89" vertex="1">
<mxGeometry x="40" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-90" value="" style="group" parent="1" vertex="1" connectable="0">
<mxGeometry x="350" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-91" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-92" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-93" value="1" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-94" value="2" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-95" value="3" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-96" value="4" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="25" y="230" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-97" value="1" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="10" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-98" value="2" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="10" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-99" value="3" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="10" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-100" value="4" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="10" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-101" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="10" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-102" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="40" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-103" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="40" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-104" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="40" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-105" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="40" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-106" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-90" vertex="1">
<mxGeometry x="40" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-107" value="5" style="group" parent="1" vertex="1" connectable="0">
<mxGeometry x="470" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-108" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-109" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-110" value="5" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-111" value="6" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-112" value="7" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-113" value="8" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="25" y="230" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-114" value="5" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="10" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-115" value="6" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="10" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-116" value="7" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="10" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-117" value="8" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="10" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-118" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="10" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-119" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="40" y="310" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-120" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="40" y="340" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-121" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="40" y="370" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-122" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="40" y="400" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-123" value="" style="ellipse;whiteSpace=wrap;html=1;aspect=fixed;" parent="Lok4d1QbW70blzeSAxq8-107" vertex="1">
<mxGeometry x="40" y="440" width="20" height="20" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-124" value="" style="group" parent="1" vertex="1" connectable="0">
<mxGeometry x="590" y="590" width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-125" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-124" vertex="1">
<mxGeometry width="70" height="480" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-126" value="" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-124" vertex="1">
<mxGeometry x="25" y="30" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-127" value="9" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-124" vertex="1">
<mxGeometry x="25" y="80" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-128" value="10" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-124" vertex="1">
<mxGeometry x="25" y="130" width="20" height="40" as="geometry" />
</mxCell>
<mxCell id="Lok4d1QbW70blzeSAxq8-129" value="11" style="rounded=0;whiteSpace=wrap;html=1;" parent="Lok4d1QbW70blzeSAxq8-124" vertex="1">
<mxGeometry x="25" y="180" width="20" height="40" as="geometry" />
</mxCell>
... 207 more lines ...
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| Attachment 4: AIDA_S100_WiringPlan.drawio.png
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539
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Fri Mar 15 16:29:57 2024 |
NH | Leakage currents |
The behaviour of the DSSSD leakage current at low voltages and during biases is unusual and varies depending on how the adapter boards are connected
To summarise the behaviour I have observed
Minimum bias configuration:
4 adapter boards, one n+n (LK1), three p+n (-ve bias), ground from n+n to one p+n
Voltage (and leakage current) unstable at low voltages, seems to settle at around -60 V
Drops can include 0 leakage current
Full adapter configuration:
8 adapter boards, ground ring complete
Same as minimum, but the drops seem to be much smaller (and not to 0 leakage current)
-60V again seems to be the turnover to a stable leakage current
In both cases the leakage current during ramping appears basically the same as when settled
Full into FEEs
8 adapter boards, fully connected to 8 FEEs
The leakage current is *much* higher during ramp,up to 17 uA near the end. No fluctuations
Once ramping has finished the current quickly drops back down and settles at the nominal leakage current
This has been observed in October/December too, it is not new (https://elog.ph.ed.ac.uk/AIDA/910)
During power up of the FEEs the current sometimes drops briefly (when the ASICs get programmed, I believe)
I think it is related to the ground (more or less current flowing through the HV supply instead of alternate paths?)
It should be kept in mind when testing new detectors to not worry about the detector at low voltages |
|
540
|
Mon Mar 18 18:04:43 2024 |
NH | Preparation for pre-s100 dry run (and test beam???) |
In preparation for the dry run the following *temporary* changes to the FEE numbering have been prepared
These should be reverted after the dry run to ensure cable->fee agreement again
AIDA09 => AIDA06
AIDA11 => AIDA07
AIDA12 => AIDA08
This will allow the merger to run with 8 FEEs for 1 DSSD
dhcpd.conf updated
The 2023Oct19-13.46.30 should work with this numbering (check tomorrow)
As should layout GSI_triple_test_renumber
AFTER dry run:
Revert DHCP and prepare for full 16 FEEs
Make new ASIC settings key for 16 FEEs and prepare the aidaXX folders
Prepare a new Layout.mlf set |
|
541
|
Tue Mar 19 10:17:30 2024 |
NH | Dry Run 2024 - 19th March 24 |
AIDA has 8 FEEs and 1 DSSSD
Aida08 (HDMI#12) had no WR again, I moved it to a different MACB and now it gets WR
The MACB (currently with jsut HDMI#10) seems issues, check/replace the upstream HDMI and thent eh MACB (after dry run!)
DSSSD#1 biased to -120 V, leakage current 5.6 uA (fig 1)
(also on Grafana)
Temps OK fig2
System Checks (fig3-5)
Clocks OK
aida07 fails calibration, others OK
WR OK (aida04 0x10, seems OK)
FPGA OK
Did "Synchronise ASIC clocks" to align ASIC clocks
(Notes for scalers: SC41L HDMI 5, SCI41R HDMI 9)
18:12 FRS is taking beam, AIDA is powered off and unbiased |
| Attachment 1: Screenshot_from_2024-03-19_13-44-34.png
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| Attachment 2: Screenshot_from_2024-03-19_13-44-22.png
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| Attachment 3: Screenshot_from_2024-03-19_13-44-04.png
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| Attachment 4: Screenshot_from_2024-03-19_13-43-44.png
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| Attachment 5: Screenshot_from_2024-03-19_13-43-24.png
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542
|
Wed Mar 20 12:22:27 2024 |
NH | Wed Mar 20 |
Turn on AIDA for Dry Run demonstrations and so on
All system wide checks, temp, bias OK
Noise situation is dreadful (but has not been optimised). Deterioriation since first mounted, suspect cabling issues with bPlast and BB7.
Note thresholds at 0x32 (!!!) to not brutalise the DAQs during testing
aida08 seems OK
Server running to MBS totally fine
18:00
Carole grounded some of the Bplast and this reduced the rates in AIDA, although they are a bit fluctuatey. Due to position constraints she couldn't ground it all
Also AIDA ribbon cables are not grounded yet
The indication is these fixes should make a lot of difference to the situation
AIDA is now powered off for the end of day |
| Attachment 1: Screenshot_from_2024-03-20_13-20-43.png
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| Attachment 2: Screenshot_from_2024-03-20_13-20-54.png
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| Attachment 3: Screenshot_from_2024-03-20_13-21-18.png
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| Attachment 4: Screenshot_from_2024-03-20_13-21-38.png
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| Attachment 5: Screenshot_from_2024-03-20_13-21-57.png
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| Attachment 6: Screenshot_from_2024-03-20_13-22-12.png
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| Attachment 7: Screenshot_from_2024-03-20_13-24-21.png
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| Attachment 8: Screenshot_from_2024-03-20_13-25-02.png
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| Attachment 9: Screenshot_from_2024-03-20_13-25-13.png
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543
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Wed Mar 20 17:02:53 2024 |
NH | /dev/sdd |
The following messages are in the system log very often:
Mar 20 18:00:56 aidas-gsi smartd[1076]: Device: /dev/sdd [SAT], 2224 Currently unreadable (pending) sectors
Mar 20 18:00:56 aidas-gsi smartd[1076]: Device: /dev/sdd [SAT], 257 Offline uncorrectable sectors
This (to me) suggests /dev/sdd may be failing. It should be backed up and later replaced (it is not used at the moment for /TapeData, older disk) |
|
557
|
Wed Apr 3 12:09:47 2024 |
NH | Report - aida06 frequently fails to boot first time (PHY error) |
When booting up AIDA aida06 usually crashes the first time, it fails to get IP from DHCP
After 180 seconds it reboots and seems to connect fine
Log file attached, key part (to me) is this:
27:03:24/14:13:19|Sending DHCP requests .
27:03:24/14:13:21|eth0: XLlTemac: PHY Link carrier lost.
27:03:24/14:13:21|..... timed out!
27:03:24/14:14:33|IP-Config: Reopening network devices...
27:03:24/14:14:33|eth0: XLlTemac: Options: 0x3fa
27:03:24/14:14:34|eth0: XLlTemac: allocating interrupt 19 for dma mode tx.
27:03:24/14:14:34|eth0: XLlTemac: allocating interrupt 18 for dma mode rx.
27:03:24/14:14:34|eth0: XLlTemac: speed set to 1000Mb/s
27:03:24/14:14:36|eth0: XLlTemac: Send Threshold = 24, Receive Threshold = 4
27:03:24/14:14:36|eth0: XLlTemac: Send Wait bound = 254, Receive Wait bound = 254
27:03:24/14:14:36|Sending DHCP requests ......
27:03:24/14:26:16| |
| Attachment 1: ttyUSB15
|
27:03:24/14:12:59|
ISOL Version 1.00 Date 9th January 2017
27:03:24/14:12:59|
Flash base address=FC000000
27:03:24/14:12:59|
Set Flash to ASync Mode
27:03:24/14:12:59|
XST_SUCCESS
27:03:24/14:12:59|
Finished copying zImage to RAM
27:03:24/14:12:59|
27:03:24/14:12:59|
Found 0 errors checking kernel image
27:03:24/14:13:00|VHDL version number 0X03350706
27:03:24/14:13:00|
Based on AIDA Bootloader version number 1.2.0 -- 16th August 2012
27:03:24/14:13:00|
Starting LMK 3200 setup
27:03:24/14:13:00|
27:03:24/14:13:00|
Setting LMK03200 to standard clock settings -- External Clock 23Nov15
27:03:24/14:13:00|
.... SPI Base Address=0x81400000
27:03:24/14:13:00|
clk_control_reg=0x4
27:03:24/14:13:01|Next step is SPIconfig
27:03:24/14:13:01|
Control 32(0x81400000)=0x180
27:03:24/14:13:01|
SlaveSel(0x81400000)=0x3
27:03:24/14:13:01|
Ctrl(0x81400000)=0xE6
27:03:24/14:13:01|
Ctrl(0x81400000)=0x86
27:03:24/14:13:01|SPIconfig done now to set up the LMK3200 registers
27:03:24/14:13:01|LMK #0 : regInit[0]=0x80000000
27:03:24/14:13:01|LMK #0 : regInit[1]=0x10070600
27:03:24/14:13:01|LMK #0 : regInit[2]=0x60601
27:03:24/14:13:01|LMK #0 : regInit[3]=0x60602
27:03:24/14:13:01|LMK #0 : regInit[4]=0x60603
27:03:24/14:13:01|LMK #0 : regInit[5]=0x70624
27:03:24/14:13:01|LMK #0 : regInit[6]=0x70605
27:03:24/14:13:01|LMK #0 : regInit[7]=0x70606
27:03:24/14:13:01|LMK #0 : regInit[8]=0x70627
27:03:24/14:13:01|LMK #0 : regInit[9]=0x10000908
27:03:24/14:13:01|LMK #0 : regInit[10]=0xA0022A09
27:03:24/14:13:01|LMK #0 : regInit[11]=0x82800B
27:03:24/14:13:01|LMK #0 : regInit[12]=0x28C800D
27:03:24/14:13:01|LMK #0 : regInit[13]=0x830020E
27:03:24/14:13:01|LMK #0 : regInit[14]=0xC800180F
27:03:24/14:13:01|
Calibrate completed at 943 counts
27:03:24/14:13:01|
Setting Clock Control =0x0000000B, to set GOE and sync bit
27:03:24/14:13:01|
Ctrl @ SPIstop (0x81400000)=0x186
27:03:24/14:13:01|
Timeout waiting for Lock detect Stage 2 (Zero Delay), PWR_DWN=0x00000004
27:03:24/14:13:01|
27:03:24/14:13:01|
Finished Clock setup LMK03200
27:03:24/14:13:01|
completed LMK 3200 setup
27:03:24/14:13:02|
Loaded all four ASICs with default settings
27:03:24/14:13:02|
Setting the ADCs into calibration mode
27:03:24/14:13:02|
27:03:24/14:13:02|
Control 32(0x81400400)=0x180
27:03:24/14:13:02|
SlaveSel(0x81400400)=0xFF
27:03:24/14:13:02|
Ctrl(0x81400400)=0xE6
27:03:24/14:13:02|
Ctrl(0x81400400)=0x86
27:03:24/14:13:02|
Init : Config of AD9252 SPI ok
27:03:24/14:13:02|
27:03:24/14:13:02|
Ctrl @ SPIstop (0x81400400)=0x186ADCs initialised
27:03:24/14:13:02|
Cal not completed
27:03:24/14:13:02|
ADC calibrate failed
27:03:24/14:13:02|
Jumping to kernel simpleboot...
27:03:24/14:13:02|
27:03:24/14:13:02|
zImage starting: loaded at 0x00a00000 (sp: 0x00bc4eb0)
27:03:24/14:13:02|
Allocating 0x3b78cc bytes for kernel ...
27:03:24/14:13:02|
gunzipping (0x00000000 <- 0x00a0f000:0x00bc380e)...done 0x39604c bytes
27:03:24/14:13:05|
27:03:24/14:13:05|
Linux/PowerPC load: console=ttyS0 root=/dev/nfs ip=on rw mem=112M
27:03:24/14:13:12|
Finalizing device tree... flat tree at 0xbd1300
27:03:24/14:13:12|
Probing IIC bus for MAC... MAC address = 0xd8 0x80 0x39 0x41 0xee 0x71
27:03:24/14:13:12|Using Xilinx Virtex440 machine description
27:03:24/14:13:12|Linux version 2.6.31 (nf@nnlxb.dl.ac.uk) (gcc version 4.2.2) #34 PREEMPT Tue Nov 15 15:57:04 GMT 2011
27:03:24/14:13:12|Zone PFN ranges:
27:03:24/14:13:12| DMA 0x00000000 -> 0x00007000
27:03:24/14:13:12| Normal 0x00007000 -> 0x00007000
27:03:24/14:13:12|Movable zone start PFN for each node
27:03:24/14:13:13|early_node_map[1] active PFN ranges
27:03:24/14:13:13| 0: 0x00000000 -> 0x00007000
27:03:24/14:13:13|MMU: Allocated 1088 bytes of context maps for 255 contexts
27:03:24/14:13:13|Built 1 zonelists in Zone order, mobility grouping on. Total pages: 28448
27:03:24/14:13:13|Kernel command line: console=ttyS0 root=/dev/nfs ip=on rw mem=112M
27:03:24/14:13:13|PID hash table entries: 512 (order: 9, 2048 bytes)
27:03:24/14:13:13|Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
27:03:24/14:13:13|Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
27:03:24/14:13:13|Memory: 109680k/114688k available (3500k kernel code, 4852k reserved, 144k data, 130k bss, 168k init)
27:03:24/14:13:13|Kernel virtual memory layout:
27:03:24/14:13:13| * 0xffffe000..0xfffff000 : fixmap
27:03:24/14:13:13| * 0xfde00000..0xfe000000 : consistent mem
27:03:24/14:13:13| * 0xfde00000..0xfde00000 : early ioremap
27:03:24/14:13:13| * 0xd1000000..0xfde00000 : vmalloc & ioremap
27:03:24/14:13:13|NR_IRQS:512
27:03:24/14:13:13|clocksource: timebase mult[a00000] shift[22] registered
27:03:24/14:13:13|Console: colour dummy device 80x25
27:03:24/14:13:13|Mount-cache hash table entries: 512
27:03:24/14:13:13|NET: Registered protocol family 16
27:03:24/14:13:14|PCI: Probing PCI hardware
27:03:24/14:13:14|bio: create slab <bio-0> at 0
27:03:24/14:13:14|NET: Registered protocol family 2
27:03:24/14:13:14|IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
27:03:24/14:13:14|TCP established hash table entries: 4096 (order: 3, 32768 bytes)
27:03:24/14:13:14|TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
27:03:24/14:13:14|TCP: Hash tables configured (established 4096 bind 4096)
27:03:24/14:13:14|TCP reno registered
27:03:24/14:13:14|NET: Registered protocol family 1
27:03:24/14:13:14|ROMFS MTD (C) 2007 Red Hat, Inc.
27:03:24/14:13:14|msgmni has been set to 214
27:03:24/14:13:14|io scheduler noop registered
27:03:24/14:13:14|io scheduler anticipatory registered
27:03:24/14:13:14|io scheduler deadline registered
27:03:24/14:13:14|io scheduler cfq registered (default)
27:03:24/14:13:14|Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
27:03:24/14:13:14|83e00000.serial: ttyS0 at MMIO 0x83e01003 (irq = 16) is a 16550
27:03:24/14:13:14|console [ttyS0] enabled
27:03:24/14:13:14|brd: module loaded
27:03:24/14:13:14|loop: module loaded
27:03:24/14:13:14|Device Tree Probing 'ethernet'
27:03:24/14:13:14|xilinx_lltemac 81c00000.ethernet: MAC address is now d8:80:39:41:ee:71
27:03:24/14:13:14|xilinx_lltemac 81c00000.ethernet: XLlTemac: using DMA mode.
27:03:24/14:13:15|XLlTemac: DCR address: 0x80
27:03:24/14:13:15|XLlTemac: buffer descriptor size: 32768 (0x8000)
27:03:24/14:13:15|XLlTemac: Allocating DMA descriptors with kmalloc
27:03:24/14:13:15|XLlTemac: (buffer_descriptor_init) phy: 0x6938000, virt: 0xc6938000, size: 0x8000
27:03:24/14:13:15|XTemac: PHY detected at address 7.
27:03:24/14:13:15|xilinx_lltemac 81c00000.ethernet: eth0: Xilinx TEMAC at 0x81C00000 mapped to 0xD1024000, irq=17
27:03:24/14:13:15|fc000000.flash: Found 1 x16 devices at 0x0 in 16-bit bank
27:03:24/14:13:15| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:13:15| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:13:15| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:13:15| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:13:15| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:13:15| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:13:15|Using buffer write method
27:03:24/14:13:15|cfi_cmdset_0001: Erase suspend on write enabled
27:03:24/14:13:15|cmdlinepart partition parsing not available
27:03:24/14:13:15|RedBoot partition parsing not available
27:03:24/14:13:15|Creating 5 MTD partitions on "fc000000.flash":
27:03:24/14:13:15|0x000000000000-0x000000500000 : "golden_firmware"
27:03:24/14:13:16|0x000000500000-0x000000800000 : "golden_kernel"
27:03:24/14:13:16|0x000000800000-0x000000d00000 : "user_firmware"
27:03:24/14:13:16|0x000000d00000-0x000000fe0000 : "user_kernel"
27:03:24/14:13:16|0x000000fe0000-0x000001000000 : "env_variables"
27:03:24/14:13:16|xilinx-xps-spi 81400400.hd-xps-spi: at 0x81400400 mapped to 0xD1028400, irq=20
27:03:24/14:13:16|SPI: XIlinx spi: bus number now 32766
27:03:24/14:13:16|xilinx-xps-spi 81400000.xps-spi: at 0x81400000 mapped to 0xD102C000, irq=21
27:03:24/14:13:16|SPI: XIlinx spi: bus number now 32765
27:03:24/14:13:16|mice: PS/2 mouse device common for all mice
27:03:24/14:13:16|Device Tree Probing 'i2c'
27:03:24/14:13:16| #0 at 0x81600000 mapped to 0xD1030000, irq=22
27:03:24/14:13:16|at24 0-0050: 1024 byte 24c08 EEPROM (writable)
27:03:24/14:13:16|TCP cubic registered
27:03:24/14:13:16|NET: Registered protocol family 17
27:03:24/14:13:16|RPC: Registered udp transport module.
27:03:24/14:13:16|RPC: Registered tcp transport module.
27:03:24/14:13:16|eth0: XLlTemac: Options: 0x3fa
27:03:24/14:13:17|eth0: XLlTemac: allocating interrupt 19 for dma mode tx.
27:03:24/14:13:17|eth0: XLlTemac: allocating interrupt 18 for dma mode rx.
27:03:24/14:13:17|eth0: XLlTemac: speed set to 1000Mb/s
27:03:24/14:13:19|eth0: XLlTemac: Send Threshold = 24, Receive Threshold = 4
27:03:24/14:13:19|eth0: XLlTemac: Send Wait bound = 254, Receive Wait bound = 254
27:03:24/14:13:19|Sending DHCP requests .
27:03:24/14:13:21|eth0: XLlTemac: PHY Link carrier lost.
27:03:24/14:13:21|..... timed out!
27:03:24/14:14:33|IP-Config: Reopening network devices...
27:03:24/14:14:33|eth0: XLlTemac: Options: 0x3fa
27:03:24/14:14:34|eth0: XLlTemac: allocating interrupt 19 for dma mode tx.
27:03:24/14:14:34|eth0: XLlTemac: allocating interrupt 18 for dma mode rx.
27:03:24/14:14:34|eth0: XLlTemac: speed set to 1000Mb/s
27:03:24/14:14:36|eth0: XLlTemac: Send Threshold = 24, Receive Threshold = 4
27:03:24/14:14:36|eth0: XLlTemac: Send Wait bound = 254, Receive Wait bound = 254
27:03:24/14:14:36|Sending DHCP requests ......
27:03:24/14:26:16|
ISOL Version 1.00 Date 9th January 2017
27:03:24/14:26:16|
Flash base address=FC000000
27:03:24/14:26:16|
Set Flash to ASync Mode
27:03:24/14:26:16|
XST_SUCCESS
27:03:24/14:26:16|
Finished copying zImage to RAM
27:03:24/14:26:17|
27:03:24/14:26:17|
Found 0 errors checking kernel image
27:03:24/14:26:18|VHDL version number 0X03350706
27:03:24/14:26:18|
Based on AIDA Bootloader version number 1.2.0 -- 16th August 2012
27:03:24/14:26:18|
Starting LMK 3200 setup
27:03:24/14:26:18|
27:03:24/14:26:18|
Setting LMK03200 to standard clock settings -- External Clock 23Nov15
27:03:24/14:26:18|
.... SPI Base Address=0x81400000
27:03:24/14:26:18|
clk_control_reg=0x4
27:03:24/14:26:18|Next step is SPIconfig
27:03:24/14:26:18|
Control 32(0x81400000)=0x180
27:03:24/14:26:18|
SlaveSel(0x81400000)=0x3
27:03:24/14:26:18|
Ctrl(0x81400000)=0xE6
27:03:24/14:26:18|
Ctrl(0x81400000)=0x86
27:03:24/14:26:18|SPIconfig done now to set up the LMK3200 registers
27:03:24/14:26:18|LMK #0 : regInit[0]=0x80000000
27:03:24/14:26:18|LMK #0 : regInit[1]=0x10070600
27:03:24/14:26:18|LMK #0 : regInit[2]=0x60601
27:03:24/14:26:19|LMK #0 : regInit[3]=0x60602
27:03:24/14:26:19|LMK #0 : regInit[4]=0x60603
27:03:24/14:26:19|LMK #0 : regInit[5]=0x70624
27:03:24/14:26:19|LMK #0 : regInit[6]=0x70605
27:03:24/14:26:19|LMK #0 : regInit[7]=0x70606
27:03:24/14:26:19|LMK #0 : regInit[8]=0x70627
27:03:24/14:26:19|LMK #0 : regInit[9]=0x10000908
27:03:24/14:26:19|LMK #0 : regInit[10]=0xA0022A09
27:03:24/14:26:19|LMK #0 : regInit[11]=0x82800B
27:03:24/14:26:19|LMK #0 : regInit[12]=0x28C800D
27:03:24/14:26:19|LMK #0 : regInit[13]=0x830020E
27:03:24/14:26:19|LMK #0 : regInit[14]=0xC800180F
27:03:24/14:26:19|
Calibrate completed at 943 counts
27:03:24/14:26:19|
Setting Clock Control =0x0000000B, to set GOE and sync bit
27:03:24/14:26:19|
Ctrl @ SPIstop (0x81400000)=0x186
27:03:24/14:26:19|
Timeout waiting for Lock detect Stage 2 (Zero Delay), PWR_DWN=0x00000004
27:03:24/14:26:19|
27:03:24/14:26:19|
Finished Clock setup LMK03200
27:03:24/14:26:19|
completed LMK 3200 setup
27:03:24/14:26:19|
Loaded all four ASICs with default settings
27:03:24/14:26:19|
Setting the ADCs into calibration mode
27:03:24/14:26:19|
27:03:24/14:26:19|
Control 32(0x81400400)=0x180
27:03:24/14:26:19|
SlaveSel(0x81400400)=0xFF
27:03:24/14:26:19|
Ctrl(0x81400400)=0xE6
27:03:24/14:26:19|
Ctrl(0x81400400)=0x86
27:03:24/14:26:19|
Init : Config of AD9252 SPI ok
27:03:24/14:26:19|
27:03:24/14:26:19|
Ctrl @ SPIstop (0x81400400)=0x186ADCs initialised
27:03:24/14:26:20|
ADCs calibrated
27:03:24/14:26:20|
27:03:24/14:26:20|
Control 32(0x81400400)=0x186
27:03:24/14:26:20|
SlaveSel(0x81400400)=0xFF
27:03:24/14:26:20|
Ctrl(0x81400400)=0xE6
27:03:24/14:26:20|
Ctrl(0x81400400)=0x86Config of AD9252 SPI ok
27:03:24/14:26:20|
27:03:24/14:26:20|
Ctrl @ SPIstop (0x81400400)=0x186Jumping to kernel simpleboot...
27:03:24/14:26:20|
27:03:24/14:26:20|
zImage starting: loaded at 0x00a00000 (sp: 0x00bc4eb0)
27:03:24/14:26:20|
Allocating 0x3b78cc bytes for kernel ...
27:03:24/14:26:20|
gunzipping (0x00000000 <- 0x00a0f000:0x00bc380e)...done 0x39604c bytes
27:03:24/14:26:23|
27:03:24/14:26:23|
Linux/PowerPC load: console=ttyS0 root=/dev/nfs ip=on rw mem=112M
27:03:24/14:26:29|
Finalizing device tree... flat tree at 0xbd1300
27:03:24/14:26:29|
Probing IIC bus for MAC... MAC address = 0xd8 0x80 0x39 0x41 0xee 0x71
27:03:24/14:26:30|Using Xilinx Virtex440 machine description
27:03:24/14:26:30|Linux version 2.6.31 (nf@nnlxb.dl.ac.uk) (gcc version 4.2.2) #34 PREEMPT Tue Nov 15 15:57:04 GMT 2011
27:03:24/14:26:30|Zone PFN ranges:
27:03:24/14:26:30| DMA 0x00000000 -> 0x00007000
27:03:24/14:26:30| Normal 0x00007000 -> 0x00007000
27:03:24/14:26:30|Movable zone start PFN for each node
27:03:24/14:26:30|early_node_map[1] active PFN ranges
27:03:24/14:26:30| 0: 0x00000000 -> 0x00007000
27:03:24/14:26:30|MMU: Allocated 1088 bytes of context maps for 255 contexts
27:03:24/14:26:30|Built 1 zonelists in Zone order, mobility grouping on. Total pages: 28448
27:03:24/14:26:31|Kernel command line: console=ttyS0 root=/dev/nfs ip=on rw mem=112M
27:03:24/14:26:31|PID hash table entries: 512 (order: 9, 2048 bytes)
27:03:24/14:26:31|Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
27:03:24/14:26:31|Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
27:03:24/14:26:31|Memory: 109680k/114688k available (3500k kernel code, 4852k reserved, 144k data, 130k bss, 168k init)
27:03:24/14:26:31|Kernel virtual memory layout:
27:03:24/14:26:31| * 0xffffe000..0xfffff000 : fixmap
27:03:24/14:26:31| * 0xfde00000..0xfe000000 : consistent mem
27:03:24/14:26:31| * 0xfde00000..0xfde00000 : early ioremap
27:03:24/14:26:31| * 0xd1000000..0xfde00000 : vmalloc & ioremap
27:03:24/14:26:31|NR_IRQS:512
27:03:24/14:26:31|clocksource: timebase mult[a00000] shift[22] registered
27:03:24/14:26:31|Console: colour dummy device 80x25
27:03:24/14:26:31|Mount-cache hash table entries: 512
27:03:24/14:26:31|NET: Registered protocol family 16
27:03:24/14:26:31|PCI: Probing PCI hardware
27:03:24/14:26:31|bio: create slab <bio-0> at 0
27:03:24/14:26:31|NET: Registered protocol family 2
27:03:24/14:26:31|IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
27:03:24/14:26:31|TCP established hash table entries: 4096 (order: 3, 32768 bytes)
27:03:24/14:26:32|TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
27:03:24/14:26:32|TCP: Hash tables configured (established 4096 bind 4096)
27:03:24/14:26:32|TCP reno registered
27:03:24/14:26:32|NET: Registered protocol family 1
27:03:24/14:26:32|ROMFS MTD (C) 2007 Red Hat, Inc.
27:03:24/14:26:32|msgmni has been set to 214
27:03:24/14:26:32|io scheduler noop registered
27:03:24/14:26:32|io scheduler anticipatory registered
27:03:24/14:26:32|io scheduler deadline registered
27:03:24/14:26:32|io scheduler cfq registered (default)
27:03:24/14:26:32|Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
27:03:24/14:26:32|83e00000.serial: ttyS0 at MMIO 0x83e01003 (irq = 16) is a 16550
27:03:24/14:26:32|console [ttyS0] enabled
27:03:24/14:26:32|brd: module loaded
27:03:24/14:26:32|loop: module loaded
27:03:24/14:26:32|Device Tree Probing 'ethernet'
27:03:24/14:26:32|xilinx_lltemac 81c00000.ethernet: MAC address is now d8:80:39:41:ee:71
27:03:24/14:26:32|xilinx_lltemac 81c00000.ethernet: XLlTemac: using DMA mode.
27:03:24/14:26:32|XLlTemac: DCR address: 0x80
27:03:24/14:26:32|XLlTemac: buffer descriptor size: 32768 (0x8000)
27:03:24/14:26:32|XLlTemac: Allocating DMA descriptors with kmalloc
27:03:24/14:26:32|XLlTemac: (buffer_descriptor_init) phy: 0x6938000, virt: 0xc6938000, size: 0x8000
27:03:24/14:26:33|XTemac: PHY detected at address 7.
27:03:24/14:26:33|xilinx_lltemac 81c00000.ethernet: eth0: Xilinx TEMAC at 0x81C00000 mapped to 0xD1024000, irq=17
27:03:24/14:26:33|fc000000.flash: Found 1 x16 devices at 0x0 in 16-bit bank
27:03:24/14:26:33| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:26:33| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:26:33| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:26:33| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:26:33| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:26:33| Intel/Sharp Extended Query Table at 0x010A
27:03:24/14:26:33|Using buffer write method
27:03:24/14:26:33|cfi_cmdset_0001: Erase suspend on write enabled
27:03:24/14:26:33|cmdlinepart partition parsing not available
27:03:24/14:26:33|RedBoot partition parsing not available
27:03:24/14:26:33|Creating 5 MTD partitions on "fc000000.flash":
27:03:24/14:26:33|0x000000000000-0x000000500000 : "golden_firmware"
27:03:24/14:26:33|0x000000500000-0x000000800000 : "golden_kernel"
... 1850 more lines ...
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558
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Wed Apr 3 12:42:57 2024 |
NH | Report aida02 WR errors |
The WR error counter for aida02 seems to consantly rise
Tried reseating cable on both ends, no change
However clock status passed, aida02 has a correct WR timestamp and no FIFO/PLL errors seen
Edit to add: aida02 has the faulty ASIC temperature readout as well, related or coincidence? |
| Attachment 1: Screenshot_from_2024-04-03_13-43-48.png
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559
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Wed Apr 3 13:02:19 2024 |
NH | Merger for 16 FEEs |
Changed /MIDAS/Linux/startup/NewMerger
Change parameters -i and -l in master64 to 16 for 16 FEEs
Update NewMerger Options LinksAvailable to 16, LinksInUse to 1%1%1%1%1%1%1%1%1%1%1%1%1%1%1%1%
Fix NetVar RunOptions 1 (was 0)
Restart Merger HTTPd, Tape, Merger, MBS Spy
Reset/Setup/Go
16 Links green and status going, all good?
Bias DSSSDs and turn data transfer on
Merger connected, shows rate and updates... no rate in Tape Server?
.. Oops forget to turn on Output to data storage in merger!
Rate in tape server and to MBS: 7 MB/s
Merger, Tape and MBS working with 16 FEEs |
| Attachment 1: Screenshot_from_2024-04-03_14-15-02.png
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638
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Tue Jun 4 15:40:32 2024 |
NH | Tues 4 Jun |
DEGAS Array over Snout again
Situation similar to yesterday, most p+n rates good |
| Attachment 1: Screenshot_from_2024-06-04_16-39-28.png
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| Attachment 2: Screenshot_from_2024-06-04_16-39-47.png
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732
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Wed Oct 29 13:01:08 2025 |
NH | Update of AnyDesk |
AnyDesk was updated to the latest version that supports CentOS 7 (EOL OS)
First the YUM repositories were migrated, as the original address was offline due to EOL
# mv yum.repos.d yum.repos.d_old
# git clone https://github.com/tkne/centos-7-repo.git yum.repos.d
The OS was updated and a needed package was installed:
# yum update-minimal
# yum install gtkglext-libs
Finally AnyDesk was downloaded:
# https_proxy=http://proxy.gsi.de:3128 wget https://download.anydesk.com/linux/anydesk-6.3.3-1.el7.x86_64.rpm
# yum install anydesk-6.3.3-1.el7.x86_64.rpm
Note that later versions (such anydesk 6.4 or 7.0) refuse to install as CentOS 7 has too old a GLIBC
The only "fix" I observe is upgrading to a supported edition such as AlmaLinux (as used by CERN)
This would need to be coordinated with STFC |