 Thu Jan 9 12:46:43 2025, JB, MP, CC, AIDA timing test 
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Quote:
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 Wed Jan 8 10:08:29 2025, JB, GB, SD, MP, CC, JG, AIDA noise test with platform in position
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Yesterday we spent time essentially performing a dry run to get AIDA DAQ and bPlast into the time sorter, there were some issues with the AIDA mbs PC
x86l-119 which was related to some boot issue, it was booting to a newer version of debian while the Relay for AIDA to MBS is on an older version (scratch)
(the machine is quite old). We spent a bit of time getting the thresholds correct for each of the ASICs. In the end we just elected to have a blanket level |
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Thu Feb 20 17:06:42 2025, JB, CC, TD,MP, WR error for aida 13,14,15,16
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| WR timestamp errors resolved after reseating the HDMI cables to the MACB |
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Fri Mar 8 16:05:57 2024, JB, CC, TD, NH, Friday 8 March
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Bias tests of AIDA on individual wafers and in parallel. Spreadsheet can be found in attachment 1, and graphic results can be seen in Attachment 2. Summary:
Upstream detector cannot be biased in parallel nor individually. Downstream detector can be biased with positively and each wafer can individually be biased
negatively. In parallel, it was not possible to bias the downstream detector negatively as indicated by the tests below. |
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Mon Apr 8 16:39:00 2024, JB, CC, TD, Monday 8 April 11x
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17.32 Power and detector bias cycle
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Wed Apr 10 08:37:57 2024, JB, CC, TD, Wednesday 10 April 47x
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09.38 CC completed install of Bplast driver PCBs yesterday evening.
All flat ribbon cables connected - all drain wires grounded
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Fri Apr 19 13:52:34 2024, JB, CC, TD, Friday 19 April contd. 23x
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12.00 Replaced AIDA ASIC mezzanine of aida01 to fix issue with asic #3
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Tue May 7 13:25:00 2024, JB, CC, NH, HMA, Tuesday 6 May - dismount snout
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Status before dismount
14:26 DSSSD#1 119.99 V @ 17.968 uA
DSSSD#2 119.95 V @ 11.212 uA |
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Tue Apr 2 12:36:25 2024, JB, CC, NH, Installing FEE64s of DSSSD2 cont.
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Some additional checks
- check 'top hat' electrical isolators are correctly installed at each of the 4x mounting points of the AIDA snout
assembly |
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Thu Jan 9 15:43:17 2025, JB, CC, MP, Timing test platform moved in
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16:30 We moved the platform in. The system was still biased and the DAQ was still running.
The system seems to be okay, temperatures OK. Bias voltage OK 685/1 and 685/2. Two FEEs - aida07 and aida12 are receiving a lot of trigger data
items from the fast discriminator. This is already a bit worrying. 685/3 |
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Thu Apr 11 22:04:50 2024, JB, 12.04.2024 AIDA-bPlast noise optimisation
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15:00 Platform in, biasing detector. Temp OK Attachment 1. test - Pulser OFF.
Rates somewhat worse than last night - probable contact on grounding of snout. Attachment
3. |
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Sat Apr 13 14:04:44 2024, JB, 13 April Noise checks 9x
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15:04 bPlast was left powered over night. Powering up to check noise conditions - also to check shifting of Germanium baseline (no change observed).
TEMP OK.
Noise condition the same as yesterday when platform was moved in. Noise in aida01 and |
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Wed Aug 14 12:40:11 2024, JB, Repaired DSSSD delivery 14.09.2024 11x
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Three BB18-1000 triples AIDAs collected on 14.09.2024
Find attached visual of the wafer and bond wire + factory bias tests accompanying the DSSSDs. elog:669/1
elog:669/2 elog:669/3 |
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Fri Jan 31 13:48:29 2025, JB, AIDA analysis from HI-DESPEC meeting 20.11.2024
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AIDA analysis and presentation by J. Bormans for AIDA made in the HISPEC-DESPEC collaboration meeting.
https://docs.google.com/presentation/d/1hlZ30r294UqbVKGy3jg-wompFpc7TSfD/edit?usp=sharing&ouid=102131181856760114019&rtpof=true&sd=true |
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Thu Mar 7 11:09:05 2024, HA, JB, CC, TD, MG, Thursday 7 March
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Snout assembly
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Thu Jun 12 13:15:25 2025, GB, CC, NK, MP, TD, Thursday 12 June 2025
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EMC tests with NK (Orsay)
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Fri Mar 13 15:48:11 2020, Friday 13th 16:00 - 24:00, OH, TD 11x
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ASIC settings 2019Oct31-13.24.23
slow comparator 0xa
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Thu Jun 13 23:04:01 2024, Dan Judson, TD, 0.00-8.00 14/6/24 40x
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0.00 checks - all looks ok
Voltage/currents - attachment 1
Rates attachment 2 + 3 |
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Mon Jun 10 07:15:48 2024, Dan, 08.00-16.00 Monday 10th June 50x
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8am checks
temps ok - attachment 2
rates ok - attachment 8 |
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Fri Apr 16 15:52:08 2021, DSJ , 16 April 16.00 shift 12x
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Clock status test result: Passed 12, Failed 0
Understand status as follows
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