 Thu Apr 11 08:27:21 2024, JB, TD, 11 April noise tests 48x
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TO-DO for 11.04.2024
- Try bringing bPlast drain wire ground back to the PSU ground for PN 300 and R&SRMP4040.
- Recheck the downstream
detector bias and ground scheme.
-
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Wed Apr 10 08:37:57 2024, JB, CC, TD, Wednesday 10 April 47x
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09.38 CC completed install of Bplast driver PCBs yesterday evening.
All flat ribbon cables connected - all drain wires grounded
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Tue Apr 9 13:22:41 2024, TD, JB, CC, Continued of 9th of April
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Disconnected test - pulser from aida08. Noise conditions improved slightly, probably less pulser events. (Attachments 1 & 2).
We recabled the dew point sensor and flow sensor for the water supply interlock to the FEE64s. When we tried to power up the interlock box, the
PSU (charging block) LED was blinking indicating an internal power instability. We then plugged each of the sensors out and into the interlock box and |
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Tue Apr 9 09:04:07 2024, TD, [How To] Remote control of BNC PB-5
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BNC PB-5 set to remote control
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Tue Apr 9 08:37:47 2024, TD, Tuesday 9 April 16x
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09.36 Cooling water temperature and flow OK
FEE64 power ON
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Mon Apr 8 16:39:00 2024, JB, CC, TD, Monday 8 April 11x
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17.32 Power and detector bias cycle
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Mon Apr 8 11:18:19 2024, TD, S505 offline analysis data file R3_150
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DRG quotes ( from Elog ) S505 FEE64 configuration as
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Mon Apr 8 10:23:16 2024, TD, JB, AIDA Noise optimisation 30x
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In the morning we reinstalled FEE64s aida06, aida13, aida07. The rails of the FEE64 boards were found to be incorrect (that of the rails that were used
in CARME).
After replacing the rails on the abovementioned FEE64s we powercycled AIDA and found the following results in the histograms and statistics. |
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Sun Apr 7 18:13:56 2024, TD, Sunday 7 April contd. 6x
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19.10 CAEN N1419ET LK fitted
power cycle
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Sun Apr 7 13:08:52 2024, TD, FEE64 configuration
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FEE64 configuration per https://elog.gsi.de/despec/S100/6
Configuration: Wide - 16 FEEs, 2 DSSD
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Sun Apr 7 12:16:27 2024, TD, aida06 system console log
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ISOL Version 1.00 Date 9th January 2017
Flash base address=FC000000
Set Flash to ASync Mode
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Sun Apr 7 12:02:23 2024, TD, Sunday 7 April 46x
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13.00 Cooling water temperature and flow OK - attachment 1
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Wed Apr 3 13:02:19 2024, NH, Merger for 16 FEEs
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Changed /MIDAS/Linux/startup/NewMerger
Change parameters -i and -l in master64 to 16 for 16 FEEs
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Wed Apr 3 12:42:57 2024, NH, Report aida02 WR errors
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The WR error counter for aida02 seems to consantly rise
Tried reseating cable on both ends, no change
However clock status passed, aida02 has a correct WR timestamp and no FIFO/PLL errors seen |
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Wed Apr 3 12:09:47 2024, NH, Report - aida06 frequently fails to boot first time (PHY error)
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When booting up AIDA aida06 usually crashes the first time, it fails to get IP from DHCP
After 180 seconds it reboots and seems to connect fine
Log file attached, key part (to me) is this: |
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Tue Apr 2 18:37:21 2024, TD, S505 ADC offsets
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S505 ADC offsets using pulser walkthrough data from data file R1
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Tue Apr 2 12:36:25 2024, JB, CC, NH, Installing FEE64s of DSSSD2 cont.
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Some additional checks
- check 'top hat' electrical isolators are correctly installed at each of the 4x mounting points of the AIDA snout
assembly |
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Wed Mar 27 14:22:35 2024, JB, NH, Installing FEE64s of DSSSD2 14x
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Mounted on frame:
DSSD 1 (Upstream) : 3208-2/3208-5/3208-8
DSSD 2 (Downstream): 3208-3/3208-21/3208-22 |
 Thu Mar 28 09:18:53 2024, TD, Installing FEE64s of DSSSD2
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Some additional checks
- check 'top hat' electrical isolators are correctly installed at each of the 4x mounting points of the AIDA snout assembly
- check snout is electrically isolated with respect to AIDA support assembly/stand, bPlas PCBs/cabling/ground/drain wires and BB7 |
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Tue Mar 26 18:56:03 2024, TD, USB-controlled ac mains relay interlock box - wiring
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Sensor ( 4 pins )
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Tue Mar 26 10:32:05 2024, NH, JB, Tue 26 March 9x
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Taken 4 FEE64s from CRYRING (the 4 easiest to access)
41:d8:2b
41:f6:5a
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