 Sat Jun 5 11:20:15 2021, TD, Saturday 5 June 9x
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12.25 DAQ continues OK - file S496/R32_48
alpha background
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Fri Jun 4 09:47:44 2021, TD, aida15 - system console output - 00.02 Friday 4 June reboot
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03/23:58:55|kernel BUG at mm/slab.c:2974!
03/23:58:55|Oops: Exception in kernel mode, sig: 5 [#1]
03/23:58:55|PREEMPT Xilinx Virtex440
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Fri Jun 4 08:40:52 2021, TD, Friday 4 June 8x
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09.20 DAQ found stopped
files in /TapeData/S496 indicate increased data rate yesterday evening from c. 18.00 until data stopped at c. midnight
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Thu Jun 3 10:16:39 2021, TD, Thursday 3 June 8x
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11.19 Hot HEC channels multiple FEE64s
ASIC check fixes
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Wed Jun 2 14:53:05 2021, OH, TD, Merger/Tapeserver issues after reboot of aida-3 6x
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On 01/06/21 aida-3 was rebooted as the graphical user interface had frozen.
We were also unable to connected to MIDAS via ssh port forwarding.
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Sun May 30 08:57:53 2021, TD, Sunday 30 May 9x
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09.55 DAQ continues - file S496/R18_588
alpha background
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Sat May 29 13:13:45 2021, TD, Saturday 29 May 9x
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14.10 DAQ continues - file S496/R18_539
alpha background
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Fri May 28 10:29:07 2021, TD, Friday 28 May 9x
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11.30 DAQ continues - file S496/R18_472
alpha background
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Thu May 27 12:25:53 2021, TD, Thursday 27 May 9x
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13.29 DAQ continues - file S496/R18_443
alpha background
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Wed May 26 13:21:59 2021, TD, Wednesday 26 May 9x
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14.22 DAQ continues - file S496/R18_369
alpha background
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Tue May 25 11:16:54 2021, TD, Tuesday 25 May 7x
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12.16 DAQ continues file S496/R18_324
alpha background
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Mon May 24 09:57:07 2021, TD, Monday 24 May 19x
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07.30 Hot HEC channels multiple FEE64s
ASIC check fixes
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Sat May 22 23:40:32 2021, TD, Sunday 23 May
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00.40 Unable to connect to FEE64s 1-7
DAQ power cycled OK
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Sat May 22 13:40:56 2021, TD, Saturday 22 May 23x
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14.37 DAQ continues file S496/R15_14
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Fri May 21 23:19:23 2021, TD, Saturday 22 May 00:00-08:00 29x
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00.16 413Gb remaining /TapeData filesystem
estimate 413/2 x 177s = 10.15h to filesystem full - OK
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Fri May 21 15:03:48 2021, CA, Friday 21st May 16:00 - 00:00 shift 17x
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16:00 CA takes over
DSSD1 n+n sides 0x20 on ASICs 1-3 and 0x64 on ASIC 4
DSSD2 n+n sides 0x1b on ASICs 1-3 and 0x64 on ASIC 4
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Fri May 21 07:03:50 2021, OH, TD, Friday 21 May 08:00-16:00 9x
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08:00 OH and TD take over
Current settings p+n sides at 0xc
DSSD1 n+n sides 0x20 on ASICs 1-3 and 0x64 on ASIC 4
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Fri May 21 06:09:28 2021, ML, system wide checks 8x
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System wide checks at 7am CET
All seems fine, nothing significant to report
Slight increase of dead time noted in FEE 3, 5 and 7. |
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Fri May 21 02:17:47 2021, ML, system wide checks 9x
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Wide check at 3am -
All fine.
Same output as at the beginning of the shift (see my previous entry) and attachments. |
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Thu May 20 23:26:11 2021, Marc Labiche (ML), system wide checks 9x
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System Wide check at begining of the night shift:
-----
Clock status test result: Passed 16, Failed 0 |