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Entry  Wed May 5 20:10:16 2021, OH, Wednesday 5 May Alpha run 12x
21:10 After all of the works in S4 today the noise in the system was considerably worse
      It was decided that before starting a new alpha run a powercycle would be performed.
      The powercycle has had no effect on the rates. They are still terrible.
Entry  Wed May 5 16:57:48 2021, TD, Tuesday 5 May Screenshot_2021-05-05_AIDA_Alerting_-_Grafana(1).png401.png

17.55 Grafana DSSSD bias & leakage current - attachment 1
       Note abrupt decrease of DSSSD# 2 leakage current c. 1.5uA at 17.37 
Entry  Tue May 4 21:26:43 2021, OH, Alpha run 10x
22:26 Tape server set up to write to directory May21
      DAQ stopped
      Slow comparator set to 0x64 for all FEE64 and an ASIC check performed
Entry  Tue May 4 14:26:50 2021, NH, FEE64 Adapter wiring diagram and layout AIDA_Adapter_Configuration(1).png
A figure showing the FEE64 numbers (a previous diagram had 2/6 and 4/8 on the wrong side of the DSSD) and the wiring of pulser/HV
Also the jumpers connected to the boards
Entry  Tue May 4 14:05:48 2021, NH, MACB Cables macb_front.jpgmacb_side.jpg
During the installation of the 4 new HDMI cables for aidas13-16 the HDMI cables between the MACB Root and the MACB leaves were looped through the cable
guide at the top to support them more
This may improve their connection and reduce the chance of WR errors seen in S460/S452
Entry  Tue May 4 13:53:22 2021, OH, TD, Tuesday 4 May 7x

NH has re-checked alignment of AIDA adaptor PCBs cf. Elog:290
Entry  Tue May 4 12:11:39 2021, OH TD, Bias test of triple 210504_1325_Rate.png210504_1326_Layout7.png210504_1327_Layout08.png210504_1334_Stats.pngVICurve.png
13:11 System wide checks all ok except *aida02 fails ADC calibration*
 Collecting the file size of each FEE64 Options CONTENTS file to check they are all the same
Entry  Sat May 1 08:45:19 2021, TD, AIDA 24cm x 8cm DSSSD + triPlast assembly for S496 12x

Photos provided by Nic Hubbard and Helena Albers from the assembly of 2x triPlast
plus 2x MSL type BB18(DS)-1000 24cm x 8cm detector assembly - attachments 1-3.
Entry  Fri Apr 30 08:38:12 2021, TD, Friday 30 April 6x
09.40 All system wide checks OK *except*

FEE64 module aida07 failed
Entry  Thu Apr 29 16:56:42 2021, OH, Config changes for 16FEE 
New set of ASIC settings produced 2021Apr29-13-16-00
- Note no longer odd/even for polarity of signal
Entry  Wed Apr 28 17:39:35 2021, TD, Preparations for setup of aida13-aida16 dhcpd.confdhcpd.conf.BAK-280421startup.tclstartup.tcl.BAK-280421

Updated /etc/dhcpd.conf
Entry  Wed Apr 28 10:06:11 2021, NH, Wednesday 28 April elog_temps.pngelog_gswr.pngelog_tse.pngelog_hv.pngAIDA_FEE.png.jpeg
11.05 All system wide checks OK *except*
WR
Entry  Tue Apr 27 08:26:01 2021, TD, Tuesday 27 April - aida09 system console reports 'received undefined information code: 1' and 'code: 9' 6x

09.25 All system wide checks OK *except*
Entry  Mon Apr 26 09:41:21 2021, TD, Monday 26 April 302.pngScreenshot_2021-04-26_Temperature_and_status_scan_aidas-gsi.pngScreenshot_2021-04-26_Statistics_aidas-gsi.pngScreenshot_2021-04-26_NewMerger_Statistics_aidas-gsi.pngScreenshot_2021-04-26_AIDA_Alerting_-_Grafana.png
10.42 All system wide checks OK *except*

 Base  Current  Difference
Entry  Sun Apr 25 10:22:16 2021, TD, Sunday 25 April 9x
11.25 All system wide checks OK *except*

 Base  Current  Difference
Entry  Sat Apr 24 15:48:38 2021, TD, aida12 crash - 08:33:03 Monday 19 April  

from ttyUSB5 system console log
Entry  Sat Apr 24 15:28:17 2021, TD, aida05 crash - 11:08:07 Tuesday 20 April 

From ttyUSB7 system console log
Entry  Sat Apr 24 15:13:33 2021, TD, aida09 crash - 08:10:52 Tuesday 20 April 

From ttyUSB6 system console log
Entry  Sat Apr 24 13:33:44 2021, TD, aida01 restart - 22.07UTC+2 Tuesday 20 April 

From aida01 /var/log/messages
Entry  Sat Apr 24 13:25:23 2021, NH, TD, AIDA FEE64 crash log for S460 

https://docs.google.com/spreadsheets/d/1CyL5L-WLsh9fsS7CN989GC3ktqiPQOkG8YIDJrrGxYA/edit#gid=0
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