ID |
Date |
Author |
Subject |
Text |
 |
16
|
Wed Jan 23 09:25:55 2019 |
CA, TD, NH, VP | MACB and setup pics 23.01.19 | Pictures of leaking cooling pipe
MACB switch settings
|
11x |
17
|
Wed Jan 23 17:03:08 2019 |
CA, TD, NH, VP | January 23rd 2019 | Post White Rabbit update
Attachment 1 - 1.8.W pulser waveform spectra |
6x |
18
|
Thu Jan 24 10:21:26 2019 |
CA, TD, NH, VP | January 24th 2019 | 10.30 AIDA setup and DAQ start complete
writing to file TapeData/NULL/R1
|
7x |
22
|
Thu Jan 24 17:16:32 2019 |
CA, TD, NH, VP | MACB time switch settings | AIDA@DESPEC MACB time switch settings before
and after WR are as follows.
|
 |
23
|
Fri Jan 25 09:54:12 2019 |
CA, TD, NH, VP | 25th January 2019 | 09.30: AIDA still running, not writing to
file
Still running ok
|
8x |
68
|
Wed Oct 30 08:06:49 2019 |
CA, TD, NH | DSSSD stack | Ribbon cables fitted with kapton PCB couplers
-> 3 isolated + 1 non-isolated for each cable
length/DSSSD
|
6x |
69
|
Wed Oct 30 11:51:08 2019 |
CA, TD, NH | Detector biasing | 12.51 - detector bias and leakage currents
- detector 3 has no current
|
  |
70
|
Thu Oct 31 09:00:58 2019 |
CA, TD, NH | Thursday 31 October | 10.05 DSSSD # 1-3 detector biases & leakage
currents OK - see attachment 1
Ambient temperature +21.2 deg C, d.p. |
14x |
80
|
Fri Nov 1 10:46:13 2019 |
CA, TD, NH | Friday 1st November 2019 | 11.46 - attachments 1,2,3: bias/leakage currents,
good event statistics and fee temperatures
(respectively)
|
6x |
82
|
Fri Nov 1 15:24:40 2019 |
CA, TD, NH | Summary - 29.10-1.11.19 |
3x MSL type BB18(DS)-1000 installed
|
|
83
|
Fri Nov 1 15:45:04 2019 |
CA, TD, NH | Summary - 29.10-1.11.19 | >
>
> - evidence of c. 1MHz extrinsic noise for |
|
84
|
Fri Nov 1 18:09:03 2019 |
CA, TD, NH | Summary - 29.10-1.11.19 | > >
> >
> > - evidence of c. 1MHz extrinsic noise |
|
195
|
Sat Mar 13 07:08:52 2021 |
CA, TD, LS | March 13th 08:00 - 17:00 | ASIC settings 2019Dec19-16.19.51
DSSSD#1 slow comparator 0xa
DSSSD#2 slow comparator 0xa
|
20x |
14
|
Mon Dec 10 11:09:53 2018 |
CA, TD | Scintillator pictures/system checks for 07.12.18 | 11.12 System wide checks ok (attachment 1)
FEE temperatures ok (attachment 2)
bias/leakage currents ok (attachment |
14x |
38
|
Mon Apr 1 08:50:35 2019 |
CA, TD | Monday April 1st 2019 - BEAM START | 09.28 System wide checks - aida06 global clock
failure (check clock status)
|
18x |
45
|
Wed Apr 3 15:24:06 2019 |
CA, TD | report - low inquire save state | On Save/Restore Module Settings Tab - "inquire
save state" returns an error. See attachment
1. |
|
180
|
Mon Mar 8 09:45:20 2021 |
CA, TD | Analysis R7_20 (new version of NewMerger with min info code 4 & 5 data items) |
An analysis of file R6_70 can be found at
https://elog.ph.ed.ac.uk/DESPEC/177 attachment |
 |
311
|
Thu May 13 07:10:17 2021 |
CA, TD | May 13th 08:00 - 16:00 shift | 08:10 all system wide checks ok *except*
all FEE64 modules fail ADC calibration
|
34x |
49
|
Thu Apr 11 15:28:10 2019 |
CA, OH, CB, TD | Offline analysis of 290319 files R13 and R16 | X projection of high energy channel ADC hits
from R13 (attachment 1)
|
6x |
150
|
Fri Mar 13 23:06:39 2020 |
CA, OH | Saturday 14th March 00:00 - 08:00 | ASIC settings 2019Oct31-13.24.23
slow comparator 0xa
|
19x |
|